2014-11-27 12:20 PM
Hi
I am using USART in Interrupt mode in Tx and Rx. Rx is working fine But in Tx I keep getting interrupt. I just need to get the interrupt once when the data is sent. but I keep getting the interrupt again and again. When I check the USART->ISR register I found that TC and TXE flags are always set. I tried to clear them from flags and inerrupt register but they are not responding to clear instructions.USART_ClearFlag() & USART_ClearITPendingBit() What should I do? Salam Hossam Alzomor #usart-interrupt-tx-tc-txe2014-11-27 03:14 PM
If you have no data to send you have to disable the TXE interrupt.
/* Clear the TC bit in the SR register by writing 0 to it */ USART_ClearFlag(USARTx, USART_FLAG_TC);2014-11-29 03:18 AM
USART_ITConfig(USART1, USART_IT_TC, DISABLE);
and not USART_ClearFlag(USARTx, USART_FLAG_TC); am I right? When I try to use USART_ClearFlag(USARTx, USART_FLAG_TC); from within the USART ISR, the interrupt flag is still set and I keep getting into the USART ISR again and again Regards Hossam Alzomor2014-11-29 05:58 AM
I have a very narrow window on what your code is doing.
What interrupts have you enabled on the USART? Then make sure you service the ones you've enabled. The ones you haven't enabled will still have IT bits set in the status, but they won't physically generate interrupts. The most probable reason a USART interrupt re-enters is that TXE is set, and you DON'T write a character to USARTx->DR (SendData), as this is the only why to clear the TXE state properly. Like I said, you need to disable the TXE interrupt if you have no data.2014-11-30 01:38 AM
according to the STM32F30xx Standard Peripheral Library section 23.2.17.5 USART_ClearFlag page 557 this function can clear TC flag
and section 23.2.17.7 USART_ClearITPendingBit page 558 it can clear pending TC interrupt and the other option is to write to Tx data register ''TC flag can be also cleared by software sequence: a read operation to USART_SR register (USART_GetFlagStatus()) followed by a write operation to USART_TDR register (USART_SendData()).'' ''TC pending bit can be also cleared by software sequence: a read operation to USART_SR register (USART_GetITStatus()) followed by a write operation to USART_TDR register (USART_SendData()).''2014-11-30 06:02 AM
Fantastic, but what interrupts do you have enabled? What does your initialization and IRQ handler code look like? What behaviour are you observing out side of the debugger?