Clear SPI TX FIFO
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‎2021-09-01 11:48 PM
I`m working with STM32G0 and SPI in slave mode.
Is it possible to clear TX FIFO buffer without any master`s clock?
In HAL library there is a function called "HAL_SPIEx_FlushRxFIFO", but no method to clear TX FIFO,
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SPI
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STM32G0 Series
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‎2021-09-02 12:47 AM
There's no easy mechanism to clear TXFIFO. Force resetting the peripheral and reinitializing is reported to work on the F0 and other families. On the H7 family, resetting SPE clears the FIFO, but not here, per the RM.
https://community.st.com/s/question/0D50X00009XkeT8/stm32f0-spi-txfifo-flush
HAL_SPIEx_FlushRxFifo just reads out DR until it's empty, no special command or anything.
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‎2021-09-04 7:19 PM
You need to use the peripheral reset control bit from RCC/SYS and reconfigure the spi...
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‎2022-03-29 5:45 AM
The HAL lets you do the RCC/SYS reset through some macros:
HAL_SPI_Abort(SPIxTypedef);
__HAL_RCC_SPI2_FORCE_RESET();
__HAL_RCC_SPI2_RELEASE_RESET();
