2012-08-11 01:32 AM
Hey guys, does someone knows why access to peripheral memory location (0x40000000 - 0x5FFFFFFF) can't be done with normal LDR and STR instructions. It works fine in simulation but when flashed in the chip, the memory accesses are bypassed (can't modify bits) in a peripheral register. Here's a simple example written in Keil where I attempt to access a GPIO register in modify the bits. The target is STM32F407VG
________________________________________________________STACK_TOP EQU 0x20000400 ; Top of the stack adress
GPIO_TOP EQU 0x40020000 ; Start adresse of GPIO-D in stm32f407VGAREA Reset, CODE, READONLY
__Vector_Table DCD STACK_TOP ;0x00 DCD Reset_Handler ;0x04 ENTRY Reset_Handler LDR r0, =GPIO_TOP MOV r1, &sharp0x55555555 ; configuration to make the pins in outpout mode STR r1, [r0] ; attempt to write to register...works in simulation not when flashed in the chip stop B stop END #gpio-rcc2012-08-11 04:29 AM
I don't have a board at hand, but I think you're writing to the GPIOA->MODER register and busting the JTAG/SWDIO
GPIOD base is at 0x40020C00 if I'm not mistaken.2012-08-11 07:31 AM
True, but it hasn't change anything when i changed the base register adresse. Thanks anyways
2012-08-12 09:52 AM
Where do you enable the GPIO peripheral clock? Not much will happen without it.
Jack Peacock2012-08-12 11:36 AM
I love you jack ehehhe thank you very much