2021-02-07 01:03 PM
Hi everybody,
I am using STM32F401CE and would like to use DMA to output a block of bytes using a 8 bit output port and a 'write' strobe output. That is, 8 output pins + 1 strobe output for the strobe pulse, per the timing diagram of the ILI9341 TFT screen controller:
https://i.imgur.com/A11Yfgh.png
Any suggestion would be greatly appreciated. I am already using DMA for double ADC sampling and it works well but didn't figure out this one yet.
Thanks,
2021-02-07 01:38 PM
You probably want to connect the TFT controller to FSMC.
JW
2021-02-07 02:22 PM
Thanks for the answer.
I am not familiar with FSMC and a quick search in the STM32F401CE's datasheet for 'FSMC' provides no hit.
Can you point me in the right direction?
2021-02-07 02:36 PM
It probably doesn't, perhaps you can pick a more appropriate part?
You could perhaps drive a pattern buffer via GPIOx->BSRR, but getting the strobe will eat a lot of memory.
2021-02-07 03:29 PM
What if I will use timer(s), can this work? E.g. a timer that generates both the strobe output and the DMA per byte trigger?
2021-02-07 03:41 PM
> I am not familiar with FSMC and a quick search in the STM32F401CE's datasheet for 'FSMC' provides no hit.
External memory interface.
Ah, the 'F401 as the lowest member of the 'F4 family is stripped of it.
Can't you go for a 'F4 or other STM32 which does have it? It simplifies this particular issue a lot.
> What if I will use timer(s), can this work? E.g. a timer that generates both the strobe output and the DMA per byte trigger?
Yes.
> Can this achieve a transfer rate of let's say 10M bytes/sec on a 84Mhz STM32F401CE?
That may be tricky. Would that be the only thing running at given DMA, probably yes. But other DMA processes will interfere, and so will processor accessing either the memory where the pattern is, and/or the GPIOs in questions.
The worst thing with this scheme is, that there's no feedback, whether the write has happened or not, into the timer. In other words, the timer ticks away, regardless of whether the DMA succeeds or is delayed. The result won't look like what you want.
> Can the DMA update Port A bits 0 to 7 without interfering with the other bits?
Using BSRR, yes, but you'd need to prepare 32-bit data into BSRR for each byte, beforehand.
JW