2010-06-29 05:34 AM
BIG PROBLEM WITH SPI Interface in STM32 completly disaster of ST
#stm32-error-problems-trouble-spi #spi-problems-stm32 #spi-problems-stm32 #sp-problems-stm32-disaster2011-05-17 04:56 AM
You are mapping SPI1 to JTAG pins, you will need to disable the JTAG function.
Refer to the STM32 Reference Manual (RM0008) Chapter on SPI. PB.3 is JTDO, PB.4 is JNTRST, and PB.5 is not 5V tolerant. ''Warning: Since some SPI3/I2S3 pins are shared with JTAG pins (SPI3_NSS/I2S3_WS with JTDI and SPI3_SCK/I2S3_CK with JTDO), they are not controlled by the I/O controller and are reserved for JTAG usage (after each Reset). For this purpose prior to configure the SPI3/I2S3 pins, the user has to disable the JTAG and use the SWD interface (when debugging the application), or disable both JTAG/SWD interfaces (for standalone application). For more information on the configuration of JTAG/SWD interface pins, please refer to Section 7.3.4: JTAG/SWD alternate function remapping.''2011-05-17 04:56 AM
2011-05-17 04:56 AM
This chips (STM32F103C8T6 and STM32F103C6T6) have not any SPI3 Interface.
STM32F103C6T6 has only 1 interface SPI (SPI1). STM32F103C8T6 has only 2 interfaces SPI (SPI1 and SPI2). You can see there is no any SPI3 interface!!!!! Section 7.3.4 ( in RM0008) do not inform about configuration JTAG!!! - this is description of APB2 peripheral reset register!!!!2011-05-17 04:56 AM
2011-05-17 04:56 AM
You must read datasheet before answer on question.
Yes. Do it yourself ;) You should read the stm datasheets of STM32F1xx very, very, extremly careful. You SHOULD NEVER believe in the text! The datasheets are more advertising texts than documentation and you should never forget this tiny detail ;) Try every feature, also banal and trivial features, even more, if you never used STMs before! The text is not wrong, but misleading! If there are two possible ways to understand a text, the worse and illogical way is the correct one. If there is a picture in the datasheet, it is mostly more precisely than the text! And of course NOTHING is so independent as said in the text!2011-05-17 04:56 AM
I know sth aout ST library for STM32.
I made few programs with use ADC in dual mode - this is so strange, even standard example in library do not correctly works. My friends said to me that never use Manufacturer Library for STM32 becouse it is big mistake!!! It take more time to write program in that then use simple instruction for that microprocesore. For that reason I will rather use: AFIO->MAPR |=0x04000000; //SWJ_CFG[2:0]=100 - JTAG & SWJ disabled; AFIO->MAPR&=0xFCFFFFFF; I will chcek it yet and coment. Thanks for helps!!! -------------------------------------------------------------------chicos wrote:
''So, all what you have to do is to call: RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO, ENABLE); GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable | GPIO_Remap_SWJ_NoJTRST, ENABLE); //---------------------------------------------------------------- You can not use: GPIO_Remap_SWJ_JTAGDisable and GPIO_Remap_SWJ_NoJTRST, you must choose or this or that. Only value 000, 001, 010 and 100 for SWJ_CFG (4 possibilities only). I try use GPIO_Remap_SWJ_Disable becouse: Full SWJ Disabled (JTAG-DP + SW-DP) ; How do you use SPI1 without RCC_APB2Periph_SPI1 in function RCC_APB2PeriphClockCmd()????? Literature: ''SWJ_CFG[2:0]: Serial wire JTAG configuration These bits are write-only (when read, the value is undefined). They are used to configure the SWJ and trace alternate function I/Os. The SWJ (Serial Wire JTAG) supports JTAG or SWD access to the Cortex debug port. The default state after reset is SWJ ON without trace. This allows JTAG or SW mode to be enabled by sending a specific sequence on the JTMS / JTCK pin. 000: Full SWJ (JTAG-DP + SW-DP): Reset State 001: Full SWJ (JTAG-DP + SW-DP) but without JNTRST 010: JTAG-DP Disabled and SW-DP Enabled 100: JTAG-DP Disabled and SW-DP DisabledOther combinations: no effect!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!2011-05-17 04:56 AM
You can see there is no any SPI3 interface!!!!!
Doesn't matter it's the PB.3 (JTDO/SPI1_SCK) and PB.4 (JNTRST/SPI1_MISO) YOU ARE USING BY REMAPPINGSection 7.3.4 ( in RM0008) do not inform about configuration JTAG!!! - this is description of APB2 peripheral reset register!!!!The Sept 2008 copy does. Refer to ''JTAG/SWD alternate function remapping'' SWJ_CFG[2:0] needs to be 010 or 100 to free the pins YOU ARE USING
2011-05-17 04:56 AM
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I checked those sentence and I found only errors
(nothing more)
in standard ST function
GPIO_PinRemapConfig(); (las time I found over 100 similar error in ST standard libraries) ;
If I used sentence:
GPIO_PinRemapConfig(GPIO_Remap_SWJ_Disable | GPIO_Remap_SPI1, ENABLE);
In AIFO->MAPR was bad value: 0x04001000 – do not switch remap of
SPI1;
If I used sentence:
GPIO_PinRemapConfig(GPIO_Remap_SWJ_Disable, ENABLE);
GPIO_PinRemapConfig(GPIO_Remap_SPI1, ENABLE);
In AIFO->MAPR was bad value 0x0F000001 – do not switch disable SWJ;
Only correct value (0x04000001) I observed for:
AFIO->MAPR |=0x01;// remap SPI1 AFIO->MAPR |=0x04000000;//disable SW and JTAG portsAnd
GPIO_PinRemapConfig(GPIO_Remap_SPI1, ENABLE);
GPIO_PinRemapConfig(GPIO_Remap_SWJ_Disable, ENABLE);
Of Course interface SPI1 still do not work correctly. I have not be able to read with using SPI1 interface as far.
Can somebody help me to find the solution of this problem???
You know microchips STM32
without SPI interface is totally useless!!!
2011-08-31 06:21 AM
hi i had the same problem
function 0b100 for disabling jtag definately doesnt work (in freeing them for gpio) fortunenately i only needed PB3/4 and also tried function 0b010 in AFIO this worked for me - the pins got free and GPIO (SPI1/3) can use em now...