2012-07-18 04:41 AM
I am having some problems in that the SCLK signal for my SPI (when using either SP1 or SPI2) appears to be incorrect. Although the period is stable throughout and as I would expect, the clock pulse itself is non symmetrical.
I dont have any idea as to what could be causing this? Does anyone have any thoughts?Thanks in advance2012-07-18 05:07 AM
Asynchronous != Asymmetrical
Without seeing a schematic or the configuration, I'm going to assume you have some odd loading on the pin, or the slave device is driving.2012-07-18 05:46 AM
Sorry, yes 'asymmetrical' is what I meant. Just being silly there.
Thanks for the tip. I will double check the loading, etc before posting any code or waveforms.Regards