ADSTART bit

[martindida]

Posted on November 08, 2012 at 11:54

Hi everybody.

I have similar problem, I already wrote here. In the past I wrote here, that when I tried to lock set pins on GPIOA channel, but System Viewer Windows showed mi that LCKR register of given pins of GPIOA are not set. Right now I have very similar problem. When I do ADC conversion on ADC1 channel1, I set the bit ADSTART of ADC1 CR register by using function ADC_StartOfConversion(ADC1) it should set ADSTART bit and the System Viewer Windows should show me that bit is set. But it doesn't do. Fun is this, that it works even though. Conversion starting, then DMA channel writes value to the area of data memory and everything works. But I would like to know. What can be problem, that the bit ADSTART is not set in System Viewer Windows? Can it be bug of uVision 4 lite studio or my stm32f0 discovery board? I debug it through ST-LINK debugger. I already tried to load value of CR register into the variable, but the result is the same, when I look at the variable in watch window it shows me, that the ADSTART bit is not set. Thanks for your help.

[Tesla DeLorean]

Posted on November 08, 2012 at 14:21

Debuggers can be invasive, and not fully support internal features of a specific part. You need to run your code/tests autonomously from a debugger, and output results read directly from the register to a serial terminal connection, or display device. This will allow you to understand what is happening internally, and make a determination if the debugger is interfering with that view.

[martindida]

Posted on November 08, 2012 at 14:39

Maybe I found out why the bit ADSTART is not set immediately after using ADC_StartOfConversion function. Because the bit TCIF in DMA ISR register is set after complet dma transfer and I use DMA complet transfer interrupt. But is it possible to switch it so quickly, that it makes immediately after passing the row  ADCx->CR | = (uint32_t)ADC_CR_ADSTART; in ADC_StartOfConversion function? I convert to channels 1. tempsensor 2. Vrefint and transfer it through DMA single shot mode to memory. Set sample time is 55_5cycles. I don't know which ADC clock I have set whether system PCLK or internall ADC clock. System clock is set to 48MHz PLL source.

Thanks for your help.

[martindida]

Posted on November 09, 2012 at 17:21

I already found the problem. Problem was, that I first configured DMA single shot transfer with ADC request with buffer size 2 values. Then, when I was configuring ADC calibration, it automatically set value 0x0040 into the DR ADC register and it invoked request from ADC for DMA and DMA wrote this value into the part of memory stated in DMA init and decremented CNDTR1. So I lost one possibility to save both 2 values from converting and I got incorrect value (for my purpose) which I don't need. This procedure of settings I partially used from ADC DMA example files. That is not completely correct for single shot mode.