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About STM32L4 ADC and SD interface problem

HMaje.1
Associate III

I have nucleo-64 STM32L476 board. I have initialised ADC. I am able to read all the three channels ( that I configured in cube Mx) correctly using DMA.

Then I added SD interface. I was able to read and write in the SD Card as well. But as soon as I initialise SD card, my ADC readings gets distorted ( not correct).

SO I traced at which point of SD intialisation this happens and found that as soon as

 /* Enable SDMMC Clock */ ( in file STM32L4xx_hal_sd.c and function HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd) )

 __HAL_SD_ENABLE(hsd); is executed, the ADC reading gets distorted.

SO commented this line, for testing purpose and found that ADC reads correctly.

Now clock configuration is that ADC CLk is at 12 Mhz and SDMMC Clk = 48 Mhz

both derived from PLLSAI1

PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART2

                             |RCC_PERIPHCLK_SDMMC1|RCC_PERIPHCLK_ADC;

 PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;

 PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1;

 PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;

 PeriphClkInit.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLLSAI1;

 PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE;

 PeriphClkInit.PLLSAI1.PLLSAI1M = 1;

 PeriphClkInit.PLLSAI1.PLLSAI1N = 12;

 PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7;

 PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2;

 PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV8;

 PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK|RCC_PLLSAI1_ADC1CLK;

can any body help to sort this problem.

Thanks in advance.

Thanks

Hitesh

9 REPLIES 9
TDK
Guru

Did you check the errata sheet?

Did you check schematic to ensure pins are separated?

If you feel a post has answered your question, please click "Accept as Solution".
HMaje.1
Associate III

Thanks for the reply.

I have gone through the errata sheet for my device and did not found such problem.

Also as far as pins are concerned, they are quit different

for ADC using lines: PC0,PC1 & PC2 while for

SD using pins PC8, PC9, PC10,PC11,PC12 & PD2

Thanks,

Hitesh

HMaje.1
Associate III

HI ..

with respect to the above problem, would like to share some more details,

The sequence followed

/* Initialize SDMMC peripheral interface with default configuration */

 status = SDMMC_Init(hsd->Instance, Init);

 __HAL_SD_DISABLE(hsd);   /* Disable SDMMC Clock */

 status = SDMMC_PowerState_ON(hsd->Instance);

 __HAL_SD_ENABLE(hsd);

HMaje.1
Associate III

HI ..

with respect to the above problem, would like to share some more details,

The sequence followed

/* Initialize SDMMC peripheral interface with default configuration */

 status = SDMMC_Init(hsd->Instance, Init);

 __HAL_SD_DISABLE(hsd);   /* Disable SDMMC Clock */

 status = SDMMC_PowerState_ON(hsd->Instance);

 __HAL_SD_ENABLE(hsd);

HMaje.1
Associate III

HI ..

with respect to the above problem, would like to share some more details,

The sequence followed

/* Initialize SDMMC peripheral interface with default configuration */

 status = SDMMC_Init(hsd->Instance, Init);

 __HAL_SD_DISABLE(hsd);  /* Disable SDMMC Clock */

 status = SDMMC_PowerState_ON(hsd->Instance);  // there is 2 ms delay in this fuction

 __HAL_SD_ENABLE(hsd); /* Enable SDMMC Clock */

Enabling SDMMC clock distorts the ADC readings.

TDK
Guru

> my ADC readings gets distorted ( not correct).

Consider better describing what you mean here. "Distorted" and "not correct" are not descriptive.

If you feel a post has answered your question, please click "Accept as Solution".
HMaje.1
Associate III

I have applied

CH1: 3.3 V

CH1: 1.27V

CH:3: 0V

This are read correctly as applied without __HAL_SD_ENABLE(hsd); /* Enable SDMMC Clock */

once SDMMC Clock is enabled it reads

CH1: 2.65V to 2.85V

CH2: 1.16 to 1.18

CH3: 0.002V

Thanks,

Hitesh

TDK
Guru

Thank you, that is a much better description. Can you max out your sample time and see if readings improve? If that doesn't work, I can't really think of anything else it may be.

If you feel a post has answered your question, please click "Accept as Solution".
HMaje.1
Associate III

Sampling time is already maximum.

Thanks,