2021-07-23 12:46 AM
// Initialisation
TIM1->PSC = (FOSC/(PWM_FREQ * PWM_STEPS)) - 1; // Timer clock
TIM1->ARR = PWM_STEPS - 1; // Auto reload
TIM1->BDTR = 0; // Safety
TIM1->CCER = 0;
TIM1->CR2 = 0;
TIM1->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2; // PWM mode 1 on channel 1 and 2
// PWM mode 1 on ch 3 for ADC sample trigger
TIM1->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2;
TIM1->CCR3 = SAMPLE_POINT;
// Turn all outputs off
TIM1->CCER = 0;
//Starting PWM
TIM1->EGR |= TIM_EGR_UG;
TIM1->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 |TIM_CCMR1_OC2M_0 | TIM_CCMR1_OC2M_2; // Channel 1 pwm Force channel 2 high
TIM1->CCER |= TIM_CCER_CC1E | TIM_CCER_CC1NE | TIM_CCER_CC2E | TIM_CCER_CC2NE | TIM_CCER_CC3E; //
TIM1->CR2 = TIM_CR2_OIS1N;
TIM1->BDTR = TIM_BDTR_MOE |(DTGMULT_8 | DTG_VAL);
TIM1->CR1 = TIM_CR1_CEN; // Start timer
2021-07-23 01:05 AM
Found the problem! The above code works but I thought the tDTG would be FOSC/PSC but it seems to be based on a higher frequency. How can tDTG be calculated?