void UART5_IRQHandler(void)
{
HAL_UART_IRQHandler(&huart5);
USER_UART_IRQHandler(&huart5);
}
void USER_UART_IRQHandler(UART_HandleTypeDef *huart)
{
if(RESET != __HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE)) //Judging whether it is idle interruption
{
__HAL_UART_CLEAR_IDLEFLAG(huart); //Clear idle interrupt sign (otherwise it will continue to enter interrupt)
HAL_UART_RxIdleCallback(huart); //Call interrupt handler
}
}
void HAL_UART_RxIdleCallback(UART_HandleTypeDef *huart)
{
if(huart == &huart5)
{
EngineAT_execute();
}
}
void EngineAT_execute()
{
EngineAT_Response_fifo_update(); //copy data from circular dma receive buffer to another buffer where sync data will be parsed
EVENT_CMDs(this, fifoBytesFilled(this->p_circle_response_async)); //parse async data from circular dma buffer
this->nextStep(this)? EngineAT_success() : EngineAT_fail(); //parse sync data, check that and potentially transmit data by dma on uart5
fifoResetBytes(this->p_circle_response_async, fifoBytesFilled(this->p_circle_response_async)); //move the tail in circular dma receive buffer
}
// Example of function called as nextStep
static bool st2_parse_at_start(struct EAT_Proc* p_eatProc)
{
if(wait_response(p_eatProc, (uint8_t*)OK, cleanRxbuff_Yes_Allways, 0U, 900))
return false;
p_eatProc->send("AT+IPR=115200\r\n");
p_eatProc->setNextStep(st2_1_parse_at_start, NOW_OUT); //1s
return true;
}
// Function used to transmit data
static void EngineAT_SendSimcomNBytes(size_t size, char *data)
{
if(size > this->dma_tx_buff->size)
{
DebugPrintSimcom("TOO SMALL TX BUFFER, need %d bytes\r\n", size);
size = this->dma_tx_buff->size;
}
memcpy(this->dma_tx_buff->data, data, size);
HAL_UART_Transmit_DMA(&huart5, this->dma_tx_buff->data, size);
}
/* UART5 init function */
void MX_UART5_Init(void)
{
huart5.Instance = UART5;
huart5.Init.BaudRate = 115200;
huart5.Init.WordLength = UART_WORDLENGTH_8B;
huart5.Init.StopBits = UART_STOPBITS_1;
huart5.Init.Parity = UART_PARITY_NONE;
huart5.Init.Mode = UART_MODE_TX_RX;
huart5.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart5.Init.OverSampling = UART_OVERSAMPLING_16;
huart5.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
huart5.Init.ClockPrescaler = UART_PRESCALER_DIV1;
huart5.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_RXOVERRUNDISABLE_INIT|UART_ADVFEATURE_DMADISABLEONERROR_INIT;
huart5.AdvancedInit.OverrunDisable = UART_ADVFEATURE_OVERRUN_DISABLE;
huart5.AdvancedInit.DMADisableonRxError = UART_ADVFEATURE_DMA_DISABLEONRXERROR;
if (HAL_UART_Init(&huart5) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart5, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart5, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_DisableFifoMode(&huart5) != HAL_OK)
{
Error_Handler();
}
}
void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
{
if(uartHandle->Instance==UART5)
{
/* USER CODE BEGIN UART5_MspInit 0 */
/* USER CODE END UART5_MspInit 0 */
/* UART5 clock enable */
__HAL_RCC_UART5_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
/**UART5 GPIO Configuration
PC12 ------> UART5_TX
PD2 ------> UART5_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF5_UART5;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_2;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF5_UART5;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
/* UART5 DMA Init */
/* UART5_RX Init */
hdma_uart5_rx.Instance = DMA2_Channel1;
hdma_uart5_rx.Init.Request = DMA_REQUEST_UART5_RX;
hdma_uart5_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_uart5_rx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_uart5_rx.Init.MemInc = DMA_MINC_ENABLE;
hdma_uart5_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_uart5_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_uart5_rx.Init.Mode = DMA_CIRCULAR;
hdma_uart5_rx.Init.Priority = DMA_PRIORITY_HIGH;
if (HAL_DMA_Init(&hdma_uart5_rx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmarx,hdma_uart5_rx);
/* UART5_TX Init */
hdma_uart5_tx.Instance = DMA2_Channel2;
hdma_uart5_tx.Init.Request = DMA_REQUEST_UART5_TX;
hdma_uart5_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_uart5_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_uart5_tx.Init.MemInc = DMA_MINC_ENABLE;
hdma_uart5_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_uart5_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_uart5_tx.Init.Mode = DMA_NORMAL;
hdma_uart5_tx.Init.Priority = DMA_PRIORITY_LOW;
if (HAL_DMA_Init(&hdma_uart5_tx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmatx,hdma_uart5_tx);
/* UART5 interrupt Init */
HAL_NVIC_SetPriority(UART5_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(UART5_IRQn);
/* USER CODE BEGIN UART5_MspInit 1 */
__HAL_UART_ENABLE_IT(&huart5, UART_IT_IDLE);
/* USER CODE END UART5_MspInit 1 */
}
}
void MX_DMA_Init(void)
{
/* DMA controller clock enable */
__HAL_RCC_DMAMUX1_CLK_ENABLE();
__HAL_RCC_DMA1_CLK_ENABLE();
__HAL_RCC_DMA2_CLK_ENABLE();
/* DMA interrupt init */
/* DMA1_Channel1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
/* DMA1_Channel2_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
/* DMA1_Channel3_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel3_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel3_IRQn);
/* DMA1_Channel4_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
/* DMA1_Channel5_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
/* DMA1_Channel6_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel6_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel6_IRQn);
/* DMA1_Channel7_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel7_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel7_IRQn);
/* DMA2_Channel1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Channel1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA2_Channel1_IRQn);
/* DMA2_Channel2_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Channel2_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(DMA2_Channel2_IRQn);
/* DMA2_Channel3_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Channel3_IRQn, 2, 0);
HAL_NVIC_EnableIRQ(DMA2_Channel3_IRQn);
/* DMA2_Channel4_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Channel4_IRQn, 2, 0);
HAL_NVIC_EnableIRQ(DMA2_Channel4_IRQn);
}
