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STM32U073 bug in SystemCoreClockUpdate()

SZano
Associate III

I'm using STM32CubeMX 6.12.0, with the firmware package U0_V1.1.0.
When generating code for a STM32U073, the file system_stm32u0xx.c is generated, which contains the implementation of the SystemCoreClockUpdate() function.
This file seems to be a mere copy of the firmware package's file "<...>\STM32Cube\Repository\STM32Cube_FW_U0_V1.1.0\Drivers\CMSIS\Device\ST\STM32U0xx\Source\Templates\system_stm32u0xx.c"
I'm attaching it for reference.
On line 330 we have:

tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U) & 0xFU];

It seems that this should actually be
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos) & 0xFU];

since RCC_CFGR_HPRE_Pos is 8, not 4 (as defined in stm32u073xx.h:5524).
The RM agrees with the value 8: §5.4.3 shows HPRE[3:0] in position [11:8] in RCC_CFGR.

Also note that stm32u0xx_hal_rcc.c:396 has the correct value (it uses the macro RCC_CFGR_HPRE_Pos, in HAL_RCC_OscConfig()).

 

Note also that the same bug potentially affects the system_stm32 file for every other MCU family too, since the shift amount is always hardcoded as 4 rather than use the macro, though other families might actually be fine with the value 4.

1 REPLY 1
SofLit
ST Employee

Hello @SZano 

I'm analyzing it and get back to you as soon as possible.

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