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STM32H7RS USB_HS failure (Device Descriptor Request Failed)

FA1234
Associate III

I cannot get OTG_HS to communicate with a USB host, and I'm out of ideas. Any help would be greatly appreciated.

The problem:

I've instrumented HAL_PCD_IRQHandler to print whenever an interrupt occurs. Right after USBD_Start, I get:

  1. 0x800 (USBSUSP)
  2. 0x1000 (USBRST)
  3. 0x2000 (ENUMDNE)

It then repeats 2 then 3 a few times until the OS gives up. I do not get any other interrupts (I'm expecting at least RXFLVL after USBRST to transfer the Setup packet). Windows reports Device Descriptor Request failed. Linux reports "device descriptor read/64, error -71".

Things I've tried:

  • DMA Mode and Not
  • Data Caching universally disabled
  • Putting hpcd_USB_OTG_HS into noncacheable memory. (Strangely, this prevents any USB interrupts from arriving for some reason)
  • I've tried enabling Activate-VBUS. This changes the behavior (I get SRQSINT, USBRST, and that's it)
  • I've tried initializing as PCD_SPEED_FULL instead of PCD_SPEED_HIGH with no changes.

Possibly relevant details:

  • VDD50USB is driven by VUSB at 5V, and VDD33USB is properly generating 3.3V internally.
  • Everything else is driven by 1.8V, and the internal SMPS regulator is used to generate Vcore, and is producing expected voltages.
  • Calling LL_PWR_IsEnabledUSBReg(), ...HSPHYReg, ...VoltageDetector() all show they are enabled. Also USB33RDY is true.
  • The HSI is driving the PLL3Q, which is divided down to 16MHz. This matches the setting in "OTG PHY reference clock selection". 
  • My SYSCLK is 600MHz, divided down to CPUCLK of 75MHz. All AHBs are running at 75MHz.
  • DVDD is connected to VCAPx which are connected to the output of VLXSMPS (after inductor and caps). (This seems correct from AN5935, page 39, where Vcore connected to DVDD)
  • VCAPx has no per-pin capacitors (this seems correct from AN5935, page 8, VCAP only used for LDO, not SMPS)
  • The USB D+/D- traces come from a USB-C port, are 90 ohm differential pair controlled impedance, and less than 30mm.

Thank you in advance for any help!

4 REPLIES 4
Amel NASRI
ST Employee

Hi @FA1234 ,

I see that the same request is already submitted in OLS system. Our team will take care to provide required support.

It will be nice to share the relevant and non confidential answers with other community members who may have similar situation.

-Amel

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

ABOUA
ST Employee

Hello,

Could you please recheck the clock configuration for USB OTG HS, make sure to align the clock configuration with the one provided in USB cubeFW USB applications, avoid using HSI with HS PHY it requires an accurate input clock

Regards

Does this mean HSI will not work, and it requires HSE? Can you point me to the document that says this?

I was surprised that HSI48 (which is supposedly specifically for USB accuracy) is not routable to the PLL_USBPHY (either directly or through the PLL). 

Thanks!

FA1234
Associate III

Respin complete, but with the same results.

- I can now run either with an external crystal (HSE) or the internal (HSI).
- I've verified the differential impedance.
Am I right in expecting the RXFLVL between the USBRST and ENUMDNE?