stm32h757IITx - open amp project not works | simple shared data M4-M7 github project not works

[sqwerize]

My project:https://easyupload.io/m/aqdlx7

Hello, I created a proprietary board with stm32H757IITx. Unfortunately, I have problems with data transfer between M4 and M7.... I am using SRAM4, configured MPU and used github project:
GitHub - adailtonjn68/STM32H7xx_inter-core_data_share

Unfortunately, but I have a problem all the time in the M7 to upload the data that the M4 is supposed to receive.... When I debug the M4 it works without a problem and the data is placed correctly.

The problem always arises here, the code falls into hard fault:

int put_to_m4(const int *const restrict buffer, const unsigned int size)
{
/* Try and get lock */
if (atomic_flag_test_and_set(&shared_data.lock1)) <----- here i have HARD_FAULT
{
  /* Return -1 in case lock is not acquired (used by other core)*/
  return -1;
}

I tried a clean project with open AMP but it also does not work, I have status = -2005 in M4 in this line:

/* Create an endpoint for rmpsg communication */.
status = OPENAMP_create_endpoint(&rp_endpoint, RPMSG_SERVICE_NAME, RPMSG_ADDR_ANY, rpmsg_recv_callback, NULL);

[mƎALLEm]

Hello @sqwerize ,

1- Please in next time use </> button to paste the code. See this link. I've updated your post.

2- OpenAmp belongs to the "STM32 MCUs Embedded software" forum board not to "STM32 products" forum. I moved it to the correct one. 

Thank you.

[Adailton Júnior]

I was able to replicate the problem.

It was some inconsistency in the MPU configuration.

According to this application note, the F7 and H7 don't support hardware coherency.

It is a bit confusing, but if you want a non-cacheable region for a normal memory type, you need to set the TEX field as 1, cacheable as 0, and bufferable as 0 (see Table 5).

(I didn't understand the last column. If I set the shareable (s) bit, the I get hard fault.)

The code setup for the M7 core is

MPU_InitStruct.Enable = MPU_REGION_ENABLE;
MPU_InitStruct.Number = MPU_REGION_NUMBER1;
MPU_InitStruct.BaseAddress = 0x38000000;
MPU_InitStruct.Size = MPU_REGION_SIZE_64KB;
MPU_InitStruct.SubRegionDisable = 0x0;
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;

The code setup for the M4 core

MPU_InitStruct.Enable = MPU_REGION_ENABLE;
MPU_InitStruct.Number = MPU_REGION_NUMBER0;
MPU_InitStruct.BaseAddress = 0x38000000;
MPU_InitStruct.Size = MPU_REGION_SIZE_64KB;
MPU_InitStruct.SubRegionDisable = 0x0;
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;

(this is equivalent to be equivalent to the first line in Table 5 (I don't know why. I would love if anyone could explain).

For both cores, I disabled instruction access, but it didn't seem to matter. That makes sense because we are using the memory region only for reading and writing.

Edit: I can set the M4 core memory region to shareable with no problem (it worked, but I don't know why).

[sqwerize]

Hey, I confirm, now the data transfer works properly! I also tested without configuring the MPU and the data exchange also worked fine.
Your MPU configuration is working correctly. I completely don't know why this is happening.... I will try to test Open AMP to see if it also works with the given configuration!

THANK YOU !!!!

[Adailton Júnior]

Great to know that.

Let me know if it also works with OpenAMP.