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STM32H743 Using Ethernet Without Cache Issue

ahmetufukgok
Associate

GOAL

To use Ethernet + LwIP on the STM32H743 chip without cache.

Explanation

We don't want to use the cache when using Ethernet because when the cache is enabled and data is sent and received via DMA on the SPI line, the correct data doesn't propagate to the bus due to a cache miss. Disabling the cache resolves this issue, which is why we prefer not to use the cache when using Ethernet.

Cube Versions:

STMCubeIDE v1.18.1 

STMCubeMX v6.14.1

STMCubeFW_H7 v1.12.0

We used the settings in the following link to configure the project by @Adam BERLINGER 's project: https://community.st.com/t5/stm32-mcus/how-to-create-a-project-for-stm32h7-with-ethernet-and-lwip-stack/ta-p/49308.

The CubeMX configurations are as follows:

CORTEX_M7 configurations

ahmetufukgok_3-1760958698580.png

ahmetufukgok_4-1760958737682.png

ETH configurations

ahmetufukgok_2-1760958670324.png

LWIP configurations

ahmetufukgok_0-1760958636747.pngahmetufukgok_1-1760958652086.png

Problems Encountered When Cache is Disabled

1. Usage Fault: The device enters a Usage Fault error when the program execution branches into the function SCB_InvalidateDCache_by_Addr() within the following call stack:

ethernetif_input() > low_level_input() > HAL_ETH_ReadData() > HAL_ETH_RXLinkCallback()

2. Bus Fault: A Bus Fault error occurs during a memory copy operation from the IP header address within the following call stack:

MX_LWIP_Init() > ethernet_input() > ip4_input() > ip_addr_copy_from_ip4()

Workaround

The issues are not observed when SCB_DisableDCache() is called immediately after HAL_Init(), even though the Data Cache is already disabled in the CubeMX configuration.

However, the problem persists under specific conditions:

  • Errors are still encountered when debugging is entered for the first time without the device's power being cycled.

  • The problem does not appear when the device's power is cut and debugging is entered immediately afterward.

  • The error is not observed when debugging is entered after the device has been powered on and off a few times.

(This behavior was tested by defining counters saved in EEPROM within the respective fault handling functions.)

I would be happy if you have an idea about this topic. Thanks in advance.

10 REPLIES 10

 


@Adam BERLINGER wrote:

I think the problem is that after power-on reset, there are random/noise data inside the Cortex-M7 cache. The cache itself has ECC (error correction code), so any operation that is not "Invalidate all" may result in ECC error. This is error is propagated to BusFault or HardFault handler (I haven't tested).

Calling the SCB_InvalidateDCache function during initialization should solve this issue. I assume calling SCB_DisableDCache might do the same job.


Thank you for response back to me. I suspect that might be the cause and I will test it. However, another problem is that it only works with the current specific LwIP configurations. I get an error again when I turn off the Speculation default mode. What could be the reason for this?

Why would it work on the STM32H757I-EVAL Evaluation board even when I turn almost every setting off, but here it only works in a very specific configuration?

Could you please share a technical document that includes the LwIP advanced options settings( @mƎALLEm @Adam BERLINGER  )?

ahmetufukgok_0-1761027015496.png