2026-02-02 1:39 AM
Hello,
I am having an SPI communication issue between an STM32H743BIT (SPI master) and a TI ADS7066IRTER ADC using SPI Mode 0 (CPOL=0, CPHA=0).
I write a configuration register and immediately read it back, but the read value does not match what was written. The logic analyzer shows correct MOSI data, but MISO often returns 0xFF or 0x80, and the SPI decoder reports “Settings mismatch”.
The write/read sequence is:
SPI_ADS7066_writeSingleRegister(hADS7066, GENERAL_CFG_ADDRESS, OPMODE_CFG_CLK_DIV_6);
if (SPI_ADS7066_readSingleRegister(hADS7066, GENERAL_CFG_ADDRESS) != OPMODE_CFG_CLK_DIV_6)
{
Throw(EMBL_ERROR);
}
Write and read functions used:
void SPI_ADS7066_writeSingleRegister(HANDLER hADS7066, uint8_t address, uint8_t data)
{
PSPI_ADS7066DESC pADS7066Desc = (PSPI_ADS7066DESC)hADS7066;
uint8_t dataTx[4] = {0};
uint8_t numberOfBytes = SPI_CRC_ENABLED(pADS7066Desc) ? 4 : 3;
EMBL_RETCODES ret;
dataTx[0] = OPCODE_WREG;
dataTx[1] = address;
dataTx[2] = data;
if (SPI_CRC_ENABLED(pADS7066Desc))
dataTx[3] = SPI_ADS7066_calculateCRC(dataTx, 3, 0xFF);
do {
ret = WRSPI_Transmit(pADS7066Desc->hSPI, dataTx, numberOfBytes);
} while (ret == EMBL_BUSY);
}
uint8_t SPI_ADS7066_readSingleRegister(HANDLER hADS7066, uint8_t address)
{
PSPI_ADS7066DESC pADS7066Desc = (PSPI_ADS7066DESC)hADS7066;
uint8_t dataTx[4] = {0};
uint8_t dataRx[4] = {0};
EMBL_RETCODES ret;
dataTx[0] = OPCODE_RREG;
dataTx[1] = address;
dataTx[2] = OPCODE_NULL;
do {
ret = WRSPI_Transmit(pADS7066Desc->hSPI, dataTx, 3);
} while (ret == EMBL_BUSY);
do {
ret = WRSPI_Receive(pADS7066Desc->hSPI, dataRx, 3);
} while (ret != EMBL_OK);
return dataRx[0];
}
I attach some figures showing the clock signal taken with oscilloscope and all the signals taken with logic analyser.
2026-02-02 1:41 AM
Hello,
In next time please use </> to share a code. Please read How to write your question to maximize your chances to find a solution
I invite you to edit your post to comply with this rule.
Thank you for your understanding.
2026-02-02 2:00 AM
There seems to be an erroneous SPI clock signal in the start of transmission.
Also on the ADS7606 data sheet there is no Register with 0x04 - the smallest is 0x08. Can you show you SPI initialisation settings.
2026-02-02 3:10 AM
Hi Rob,
I think the logic analyzer is reading 0x04 because the clock starts incorrectly. What’s curious is that when I checked the oscilloscope, this erroneous behavior didn’t appear. In theory I should be sending 0x08, 0x01, 0x06 and then reading the same dares sanding first 0x10, 0x01(address), 0x00(Null). The I should receive the data on that register.
I’m attaching a figure showing my SPI initialization.
Thank you for the answer.