As I understand from the low_level_output of ethernetif.c, I could have up to the number of ETH_TX_DESC_CNT of buffers.
In the stm32h7xx_hal_eth.c ETH_Prepare_Tx_Descriptors (not counting the context descriptors) I "upload" the buffers to the Descriptors and increment the current descriptor (without writing to the register) by the number of buffers - 1 -> ETH_TX_DESC_CNT-1 if I did not encounter any still dma-owned descriptors.
After that in the calling function of HA_ETH_Transmit I increment the current descriptor (so it would now be ETH_TX_DESC_CNT ) and write it to the Register.
By my understanding that case would not trigger any transmission, since the address for the tailpointer basically stays the same as it would wrap around if I am reading the ref-man correctly.
In that case it would mean, I could only assign up to ETH_TX_DESC_CNT-1 Packets in the beginning, since from the ref-man the transmission is done when Current Descriptor != Tail Pointer (63.10.2 in RM0468 v2).
PS: I have not tested this case, yet as I have not gotten the driver to work on my system.
