STM32F407VET6 Custom Board Ethernet not working

[rromano001]

Hello, F407VET TQFP100 on custom board, ethernet PHY LAN8742A, STMCUBEIDE 1.6.1 on Linux (mint).

PHY and MCU both clocked by 25MHz oscillator, reference clock 50MHz is OK. Cpu running @168MHz

FREERTOS 3 task:

default init LWIP, start HTTPD thread then feed TCPIP ECHO server

Task1: feed UDP Echo Server

Task2: managing RGB led

Task 2 is OK but no signal come from Ethernet remain in idle color fading.

default task init LWIP, start HTTPD task, release init flag enter loop..

task 1 Ethernet echo enter loop after flag released.

Checked MDIO Bus activity with Saleae Logic 8 pro it show PHY doesn't complete initialization:

• Involved register in communication:

control register address 0

status register address 1

interrupt source flag register address 0x1d

special control/status register address 0x1f

• Decoded status on register read:

Register 0 two state were found decode:

0x7809 decode to -> all 10/100tx mode enabled, auto negotiation not complete, link down.

0x782d decode to -> all 10/100tx mode enabled, autonegotiation complete Link is UP

register 10 0x41 decode -> 4 reserved flag, 1 crossover time extention enabled

register 1d 0xca decode -> Energy EON, Autonegotiation complete, Autonegotiation LP Ack, Autonegotiation page received.

bit 0 is reserved so why write 1 when default to 0???

• Simplified MDIO communication

write register 0 phyadd 0 0x8000 (Software reset)

repeatedly read register 0x1f Phyadd 0x1f (??) result 0xffff (Open bus)

read register 1 Phyadd 0 result for a while 0x7809

after many poll status change to 0x782d

...

write register 0 phyadd 0 0x1000 (Auto Negotiation)

read register 1 Phyadd 0 result 0x782d

read register 0x10 Phyadd 0 result 0x0041

read register 0x1d Phyadd 0 result 0x00ca

write register 0x1d Phyadd 0 result 0x00cb

read register 0x1d Phyadd 0 result 0x00ca

read register 1 Phyadd 0 result 0x782d

no more action appear on MDIO bus

No visible activity on rx tx PHY lines

Link led active solid.

Activity led pulse on ping packet

pcb is 4 layer, need some fixes due was planned for F429. Components shortage forced a change to F407, on this SPI 4 not present require some fix but nothing to do with LAN interface.

Has someone idea of what can be wrong? Read Piranha post but leave us at ground level, say what wrong ( I fell can be too) but no idea where are located (VERY) sparse files of Ethernet module.

Previous test were done on nucleo board with Adafruit LCD. Extended to FREERTOS and lan but none of old project compile on new ide. My cat router assistant declared hand off too 😉

Thank in advance

[rromano001]

Hi Sebastiaan, I'm glad about your kind answer,

I cannot grasp out what it mean interrupt driven and interrupt pin:

PHY Interrupt is not available, both MCU and PHY were driven from single Xtal oscillator at 25 MHz. This way interrupt pin is superseeded by 50MHz reference clock. Check page 28 of PHY datasheet about PHY interrupt.

A simple polling of PHY register is not hogging MCU but avoid use not thread secure access to MDIO by HAL deadlocking.

Interrupt from MAC is internal to MCU and do not require pin.

I don't wish debug Network code after what I seen. Yes wasting at almost one month can solve issue but writing from scratch maybe less frustrating than read similar hurting buggy bouncing.

[Sebastiaan]

Yes you're right about the interrupts, it's been > half a year ago that I did ethernet bringup. As long as mac eth interrupts are enabled, it should be all good. But as mentioned, the additional "netif_set_up()" call is probably required for you as well (to support dynamic plugging of cables).

I am willing to try out the 10Mbps test tomorrow, but I'll leave the ping flooding for you to test, after ping itself is working fine for you. Please make sure that ICMP is enabled (including the LWIP_BROADCAST_PING / LWIP_MULTICAST_PING) and trace a ping packet through LWIP stack from start to end, so you can see which checks it's passing / failing and why no response is generated.

[rromano001]

Hello Sebastiaan, one more bug catched up: netif_set_up() MUST BE CALLED TO BRING UP INTERFACE.. Really **SEVERE** Deadlocking BUG.

About LWIP settings ARP protocol on working board complete obtaining an IP from DHCP, what is also strange as you can see from dynamic probing IP address remain zero also after negotiation of IP. This is not same across processor kind.

LWIP Stack is ok, tested injecting a raw packet from FPGA. What is troubled is Ethernet driver.

[Tesla DeLorean]

The F407 vs F417 should be identical, what you might want to look at is the chip stepping/revision, see DBGMCU->IDCODE

0x411 was an early F407 as I recall

0x413 should be the current one for F407/F417

[rromano001]

Hello Tesla DeLorean, all other, Yesterday I finally received new F407 chip.

Applied to a new board it work and respond to ping. Now 3 board are complete, F407 With name First doesn't work. F407_Last and F417 work.

Attached are images from CubeIde register and from Cubeprogrammer, all MCU return same ID, just F417 report version Y instead of version 2.0.

Also attached as Zip the text dump of all register by part.

Hardware test:

On board F407_First try'd rework PHY, no success, New PHY still complete negotiation and link but no MAC TX activity.

Don't rework F407 for now I reserve do some Inspection on.

Software test:

traced init, HTTP task is not activated, terminate with memory allocation error... ??? ...

Increased Heap from default 15360 to 32K HTTPD task was correctly spawn.

Still slow when image file are accessed but now both 407 and 417 perform same way. First board remain behind dryer waiting some new hint to address failure reason.