Solved
Should nor flash be mapped as non cacheable memory ?
Hello,
When using external NOR is it reasonable to configure its memory addresses as cacheable or should it always be configured as NON-cacheable?
If it is cacheable it means that when executing a programming nor command, it is not yet written into device.
Only if PROGRAM_TIMEOUT is large enough then validation works (write, read and compare)
HAL_NOR_Program(&norHandle, (uint32_t *)(NOR_DEVICE_ADDR + uwStartAddress), pData);
if(HAL_NOR_GetStatus(&norHandle, NOR_DEVICE_ADDR, PROGRAM_TIMEOUT) != HAL_NOR_STATUS_SUCCESS)
....- Why a large timeout result in validation suceess ? Does it mean that only after this timeout the data was actually writted into device (in cacheable mapping scenario) ?
- I've configured NOR address in MPU as non cacheable and thing behave better: the timeout can be lowered to 0 , and there is also the certainty that each NOR programming reaches NOR device.
Shouldn't it be always configured as non cahceable also in examples ?
Thank you for any comment,
ranran
