Multiple GPIO same I2C peripheral/alternate function

[LeeK]

Hi,

Probably a dump question but wanted to make sure I got it right.

On a STM32 MCU, lets say
PB0/PB1 (scl/sda) have AF4 as I2C1
PB5/PB6 (scl/sda) have AF4 as I2C1

If I configure all PB0/PB1/PB5/PB6 to use AF4 as I2C1,
Enabling/reading/writing on I2C1 works as expected as long as the slave devices on (PB0PB1 and PB5PB6) have different addresses?
Or should we only have one set of pins (PB0PB1 or PB5PB6) configured to use I2C1 ?

Thank you.

[waclawek.jan · Accepted solution]

Which STM32?

Connecting several pins to the same peripheral pad in the GPIO matrix is something explicitly forbidden in some STM32 RM, and certainly not documented as functional in others.

Apart from this, experiments show that (at least in some STM32) if two pins are connected to the same peripheral pad, their input signals are ORed. This is not what you'd want for I2C, where you'd want them to be ANDed, so I believe this arrangement would not work.

However, you can dynamically change the assigned pin pair, i.e. initially set as AF only one pin pair,  communicate to first device on this pin pair, then change this pin pair in GPIO to Input (or Output set to 1, as it's OC it does not matter), set the other pair to AF, communicate to the other device on that pair, set them back to Input/Output, set first pair to AF... etc.

Zephyr has nothing to do with this.

JW

[LeeK]

It is a STM32F746.

Thank you for the link. Really helpful.

Ya dynamically changing the AF of the pins would work but was wondering the behavior with multiple pairs assigned to same I2C.

[Tesla DeLorean]

Pick one operational SCL and SDA pin from those available. 

Perhaps look for other I2Cx that share support of pins you need.