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How is CMSIS DSP and NN library implement using SIMD instruction and FPU?

Associate III

I came across a documentation stating that arm m4+ processors have CMSIS DSP api that is implemented with SIMD instructions. When we try to take the library file to use it there are 2 variants single precision and doubles precision FPU. I assumed that FPU is a hardware unit with its own instructions to accelerate calculations , however after reading about SIMD I am confused how SIMD and FPU are related to CMSIS DSP library.

Andrew Neil

Please give a link to that document for context.

Googling "Cortex-M4 SIMD" gives this whitepaper:

Perhaps that helps you?

It's not really anything specifically to do with STM32