2022-04-07 07:52 PM
I am testing F411RE Nucleo USART speed.
Sample code is: STM32Cube_FW_F4_V1.26.0\Projects\STM32F411RE-Nucleo\Examples_LL\USART\USART_Communication_TxRx_DMA
At PC side, I am using Putty as serial receiver.
So far, the highest working baud rate is slightly more than 2M; however, the data sheet for STM32F411xC and STM32F411xE claims at least 3M.
Anything I can do to the code to achieve that?
2022-04-07 08:29 PM
You ability to hit 3Mbaud exactly would require you to run the bus at 48 MHz, and CPU at 96 MHz, not 100 MHz
The higher the rate, the larger the potential error due to the way the divider works.
Also be aware that most RS232 level shifters frequently have a bandwidth of 1 Mbaud.
2022-04-07 08:36 PM
> At PC side, I am using Putty as serial receiver.
Do you if the PC side support 3MBaud? Most UART to USB chips top out support at around 1 MBaud.
Getting a logic analyzer on the RX and TX lines would confirm.
Also need to ensure the clock source is stable (i.e. use HSE) and that the chosen baud rate is compatible with your clock rate (i.e. an integer multiple or otherwise within tolerance limits).
2022-04-07 10:53 PM
yes, PC side supports, which I have verified with another device.
2022-04-08 07:03 AM
2022-04-08 07:32 AM
Which USART do you use?
Could you be more specific on how to correctly set its clock?
2022-04-08 09:00 AM
Send a repetitive 0x55 ('U') pattern at the baud rate you've set, and scope that, measuring the frequency. Should read 1.5 MHz for 3.0 Mbaud
BRR = APBCLK / (Baud * 16)
100 MHz / 2 * 16 = 3.125 Mbaud (4% off 3 Mbaud)
100 MHz / 1 * 16 = 6.25 Mbaud
To hit 3 Mbaud more exactly you'll need APB2:96 MHz, APB1:48 MHz, due to the use of integer dividers.
Set up the PLL to run your F411 at 96 MHz rather than 100 MHz
2022-04-09 07:30 AM
What is tge clock source tolerance, and how does it fares with baudrate spread?
2022-04-10 02:59 AM
Sorry, I don't get the point of your question?