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Hey KDJEM.1,
Do you know a description of using an APS256XXN-OBRx with an STM32H7RS series MCU?
I made a board for my project, which is based on an STM32H7R3L8H6H MCU, an APS256XXN-OBR-BG 256MBit PSRAM on HEXASPI, an MX25UW25645GXDI00-T 256MBit flash on OCTOSPI, and an EMMC08G-MV28-01J10 SDMMC, among other peripherals.
Here are some pictures of it:
Thanks to Mohamed_Aziz_REZGUI's post, I was able to optimize the MX25UW25645GXDI00-T on the OCTOSPI.
The APS256XXN-OBR-BG on the HEXASPI is working, but it's probably not optimal. The example code for the STM32H7S78-DK that I found in the firmware package "STM32Cube_FW_H7RS_V1.1.0" contains several bugs and flaws. I spent countless hours searching the Internet for something useful, but unfortunately, I couldn't find anything.
Here is one example of what I think can't be correct:
static void Configure_APMemory(void)
{
/* MR0 register for read and write */
uint8_t regW_MR0[2]={0x24,0x8D}; /* To configure AP memory Latency Type and drive Strength */
uint8_t regR_MR0[2]={0};
/* MR8 register for read and write */
uint8_t regW_MR8[2]={0x4B,0x08}; /* To configure AP memory Burst Type */
uint8_t regR_MR8[2]={0};
/*Read Latency */
uint8_t latency=6;
/* Configure Read Latency and drive Strength */
if (APS256_WriteReg(&hxspi1, MR0, regW_MR0) != HAL_OK)
{
Error_Handler();
}
/* Check MR0 configuration */
if (APS256_ReadReg(&hxspi1, MR0, regR_MR0, latency ) != HAL_OK)
{
Error_Handler();
}
/* Check MR0 configuration */
if (regR_MR0 [0] != regW_MR0 [0])
{
Error_Handler() ;
}
/* Configure Burst Length */
if (APS256_WriteReg(&hxspi1, MR8, regW_MR8) != HAL_OK)
{
Error_Handler();
}
/* Check MR8 configuration */
if (APS256_ReadReg(&hxspi1, MR8, regR_MR8, 6) != HAL_OK)
{
Error_Handler();
}
if (regR_MR8[0] != regW_MR8[0])
{
Error_Handler() ;
}
}
This routine is used to configure and initialize the PSRAM chip.
The data sent to the MR0 and MR8 registers don't match the description in the APS256XXN-OBR-BG's datasheet.
/* MR0 register for read and write */
uint8_t regW_MR0[2]={0x24,0x8D}; /* To configure AP memory Latency Type and drive Strength */
uint8_t regR_MR0[2]={0};
/* MR8 register for read and write */
uint8_t regW_MR8[2]={0x4B,0x08}; /* To configure AP memory Burst Type */
uint8_t regR_MR8[2]={0};
Please let me know if you know of any good documentation about this. In the meantime, I'll keep tinkering with my board and hope to learn about that initialization.
Thank you, and never forget:
"Always be yourself. Unless you can be a pirate. Then always be a pirate."
