Can STM32F207xx Generate 50MHz Clock for RMII Ethernet PHY ?

[martin]

Posted on August 29, 2013 at 04:24

With regard to the STM32F207ZET, on Page 30 of the current STM32F207xxx Datasheet (Doc ID 15818 Rev 9 Oct 2012) it says ''...the PHY is connected to the STM32F207xx MII port using 17 signals for MII or 9 signals for RMII, and can be clocked using the 25 MHz (MII) or 50 MHz (RMII) output from the STM32F207xx''.

I understand this means the STM32F207xx can provide the 50MHz clock required by a PHY circuit operating in RMII mode.  But I can find no further reference to this, such as any details of how the STM32F207xx must be configured to enable this, or even which pin the 50MHz RMII Clock Signal will be output on.  However, on page 164 of the same datasheet the 50MHz signal is shown being provided by a seperate crystal oscillator.

So, is it possible to have the STM32F207xx provide the 50MHz Clock Signal required for a RMII PHY, or is the datasheet incorrect on Page 30 ?

If it is possible to have the STM32F207xx provide the 50MHz Clock Signal required for the RMII PHY, what documentation describes how to make use of this ?

Thanking you,

mai-au. #rmii #stm32f207xx #50mhz #ethernet

[peterdonchev]

Posted on February 26, 2015 at 18:56

I will put 25MHz SMD crystal, PLLI2S will run at 100MHz and prescaler on MCO2 pin by 2, so 50MHz external clock for PHY and MAC.

[damh]

Posted on February 27, 2015 at 09:26

I would be very careful. Some ST-Chips doesn't provide a stable (enough) 50MHz MCO (F207 - Errata(MCO PLL clock pins not compatible with Ethernet IEEE802.3 long term jitter specifications)). Perhaps the F407 has the same problem. Check it!

We are using the external crystal and that works very well.

[peterdonchev]

Posted on February 27, 2015 at 12:34

Thanks for the advice. There is no such problem in the STM32F407 errata, but customer decided to drop one of the connectors and now I will have enough space for second crystal.

[antonius]

Posted on July 29, 2015 at 12:43

Guys,

I used external clock with 8MHz crystal for STM32F107VCT6 on pin osc_in and osc_out....and 50MHz external crystal for DP83848 and Reference clock to pin A1 STM32F107VCT6.... What's the valid value for HCLK ? Do I need 25 MHz external crystal on pin osc_in and osc_out ? or playing with clock configuration and using 8MHz crystal ? Thanks