Can I use the STM32F4 PTP clock without an RMII clock?

[Michael T]

I'd like to use the PTP clock peripheral in my STM32F427 for timekeeping - but without using the rest of the ethernet functionality, or dedicating any pins to it.

I prefer the PTP clock to the RTC as it offers a 32-bit subsecond (rather than the 16 bits the RTC provides) and 32-bit seconds (rather than the RTC which counts seconds-minutes-hours-days-months-years)

In my experiments so far, I can only start the PTP clock when a clock is provided on ETH_RMII _REF_CLK although I don't need to configure any other pins for the RMII interface. Sadly, my PCBs are already made and don't provide such a clock on that pin.

Is there any way to either start the PTP clock without providing a clock on the ETH_RMII _REF_CLK pin?

[Tesla DeLorean]

Haven't dug into it from the other side.

Could you chain TIM2 and TIM5​, and track down to microseconds or less, and then count off seconds.

[Michael T]

Thanks for taking the time to read my post and reply!

The reason I'm interested in the PTP clock and RTC is because they both have fine correction features, which can apply step-free monotonic corrections for crystal inaccuracy, with a resolution of about 1 PPM.

Unfortunately, conventional timers could not provide this as far as I can tell.

[Tesla DeLorean]

Looking over RM0090, does look like you should be able to clock from HCLK, and looks to provide fractional adders, and fine tuning adder.

Don't see a good explanation of where 0.46ns comes from, was assuming the add was occuring at 168 or 180 MHz

[Michael T]

The 0.46ns comes because there's a choice of the threshold to increment the second register. You can increment when the subseconds reach decimal 999,999,999 so that subseconds are 1.0ns, or you can increment when subseconds reach hex 0x7FFFFFFF so subseconds are 0.46ns. The choice is configured by the TSSSR bit in ETH_PTPTSCR.

[waclawek.jan]

> In my experiments so far, I can only start the PTP clock when a clock is provided on ETH_RMII _REF_CLK

Okay, and what exactly did you try? Which clocks did you enable? Which registers did you attempt to write, and which did actually change (checked by readback, careful because of the errata)? Did you set MII or RMII (and if only one of them, can you please try the other?)

If everything fails, you perhaps can connect MCO to the reference clock externally.

JW

[Tesla DeLorean]

Ok 1 / 2^31

[Michael T]

I basically took STMCube-generated ethernet code, added stuff to get the PTP clock to start, then removed lines when doing so didn't stop it working. Some of the lines that remain are redundant, because I didn't finish the job when I discovered this clock pin issue.

I did my experimentation on the NUCLEO-F429ZI board, so I had a PHY and external clock already wired to pin A1 (I hoped stmcube might generate me some code with PTP already configured, but it turns out it won't - gave me a working ethernet port though, so better than nothing)

int initPtp(void) {
 
  GPIO_InitTypeDef gpioInit
  gpioInit.GPIO_Pin  = GPIO_Pin_1;
  gpioInit.GPIO_Mode = GPIO_Mode_AF;
  gpioInit.GPIO_Speed = GPIO_Speed_100MHz;
  gpioInit.GPIO_OType = GPIO_OType_PP;
  gpioInit.GPIO_PuPd = GPIO_PuPd_NOPULL;
  GPIO_Init(GPIOA, &gpioInit);
  GPIO_PinAFConfig(GPIOA,GPIO_PinSource1,GPIO_AF_ETH) ;
 
  __HAL_RCC_ETH_CLK_ENABLE();
  __HAL_RCC_SYSCFG_CLK_ENABLE();
  SYSCFG->PMC &= ~(SYSCFG_PMC_MII_RMII_SEL);
  SYSCFG->PMC |= ETH_MEDIA_INTERFACE_RMII;
 
  __HAL_RCC_ETH_CLK_ENABLE();
  __HAL_RCC_ETHMACPTP_CLK_ENABLE();
  ETH_TypeDef * eth = ETH;
 
  // 1. Mask the Time stamp trigger interrupt by setting bit 9 in the MACIMR register.
  eth->MACIMR |= ETH_MACIMR_TSTIM;
  // 2. Program Time stamp register bit 0 to enable time stamping.
  eth->PTPTSCR |= ETH_PTPTSCR_TSE;
 
  // 3. Program the Subsecond increment register based on the PTP clock frequency.
  eth->PTPSSIR = 20; //nanoseconds
 
  // 4. If you are using the Fine correction method, program the Time stamp addend register
  // and set Time stamp control register bit 5 (addend register update).
  eth->PTPTSAR = 1193046471; // 2^32/180 MHz/20 nanoseconds = 1193046471
  eth->PTPTSCR |= ETH_PTPTSCR_TSARU;
 
  // 5. Poll the Time stamp control register until bit 5 is cleared.
  while (eth->PTPTSCR & ETH_PTPTSCR_TSARU);
 
  // 6. To select the Fine correction method (if required), program Time stamp control register
  // bit 1.
  eth->PTPTSCR |= ETH_PTPTSCR_TSARU;
 
  // 7. Program the Time stamp high update and Time stamp low update registers with the
  // appropriate time value.
  eth->PTPTSHUR = 0;
  eth->PTPTSLUR = 0;
 
  // 8. Set Time stamp control register bit 2 (Time stamp init).
  eth->PTPTSCR |= ETH_PTPTSCR_TSSTI;
 
  // 9. The Time stamp counter starts operation as soon as it is initialized with the value
  // written in the Time stamp update register.
  // 10. Enable the MAC receiver and transmitter for proper time stamping.
}

If you remove the pin A1 configuration and power-cycle, the loop at line 35 hangs forever.

On the other hand with the pin configuration present, polling the PTP clock with code or a debugger shows it running at the expected speed.

[waclawek.jan]

Hummm.

Thanks for the details.

JW

[AFaya.1]

I am using STM32h753zi MCU and I am trying to enable RMII_PTP_Synchro in STM32 CubeMX but the option is not able to select. Please give me a guidance. Thankyou.