Why do we choose LSE capacitance low?

[Freedom_Neo]

STM32H7B3I-DK - Discovery kit use NX3215SA-32.768KHZ-EXS00A-MU00525 Crystal. Crystal Load Capacitance is 6, 9, 12.5 pF but STM32H7B3I-DK - Discovery kit use 1.5pF. Why it use different load capacitance.

[Piranha]

> Read AN2867.

Which part of this sentence from the previous topic you do not understand?

[Freedom_Neo · Accepted solution]

First, you must be sure that your crystal is compatible with the selected STM32 LSE. Then, it is highly recommended to use a crystal with low pullability, that is with CL ≥ 6 pF:

7 pF is a good compromise between low drift and moderate power consumption

9 and 12.5 pF can be used in noisy environments, but impact the power consumption.

[Freedom_Neo]

Hi @Piranha​ I created new a thread for information.

[Tesla DeLorean]

Peter did ask for a new thread based on different STM32. Back-linking so can find later.

https://community.st.com/s/question/0D53W00001ScZorSAF/internal-rtc-clock-lag-issue

[Piranha]

That quote doesn't even answer your question about the capacitors.

I'll tell you a secret - to understand a load capacitance, you should at least read the section called "Load capacitance"!

[Freedom_Neo]

Hi @Piranha​ Load capasitans inclueds a formule. How we know the stray capacitance (CS) value? Should we choose an estimated value? Can we know its real value?