What's the correct supply scheme for VDDLDO on STM32H7?

[Hansel]

According to Fig. 3 in application note AN4938, VDDLDO should be connected to VDD, decoupled by a 4.7 µF capacitor as shown in the diagram below. But when I check the reference schematic in Fig. 18 of the same document, there's no such capacitor. I've also looked at the schematics for the STM32H745 Discovery board (MB1381) and there is also no dedicated capacitor for VDDLDO. So is this really critical or can I leave this capacitor out?

[Hansel]

It's definitely inconsistent among the figure shown above and the reference schematic. Did anyone else here come across this inconsistency? What was your solution? Ignore the second 4.7 µF capacitor?

[Tesla DeLorean]

The diagram you posted is consistent with a design where VDD and VDDLDO are independent.

It can be connected to VDD but it doesn't have to be, and could be lower, seeing as it gets the core voltages, and is independent of the GPIO/IO voltages. So VDDLDO could be 1.8V and VDD 3.3V

The bulk capacitor is for the inrush on the regulator, and the VCAP ones are on the core side 1.25V

If you use different supplies, you're going to want near in and localized bulk capacitance, and you really don't want long traces with all the 400-500 MHz CMOS switching currents.

If VDD = VDDLDO you can probably get away with one capacitor if you have nice meaty power and ground floods/traces so it's not having to fight to pull charge across your entire board from your input/regulation. If its more convenient you could probably use 2x 2.2uF closer to each demand, but remaining on the same nets.

[Hansel]

OK, thanks for your post. I take it that the second cap is needed when VDDLDO is separate from VDD. My LDO, a TLV76733DRVR, is located about 2.5 cm away from the BGA version of the µC (center to center) with the 4.7 µF cap located halfway in between. It appears I can do without a second cap.

[JIHW1990]

Please refer to manual AN5419