2021-04-02 05:08 AM
Here is the report:
Open On-Chip Debugger 0.11.0-rc2+dev-00037-g4c4dbd9 (2021-02-09-13:39)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : STLINK V2J37S0 (API v2) VID:PID 0483:3748
Info : Target voltage: 2.903249
Info : Unable to match requested speed 8000 kHz, using 4000 kHz
Info : Unable to match requested speed 8000 kHz, using 4000 kHz
Info : clock speed 4000 kHz
Info : stlink_dap_op_connect(connect)
Info : SWD DPIDR 0x2ba01477
Info : STM32L152RCTx.cpu: hardware has 6 breakpoints, 4 watchpoints
Info : starting gdb server for STM32L152RCTx.cpu on 3333
Info : Listening on port 3333 for gdb connections
Info : stlink_dap_op_connect(reconnect)
Info : SWD DPIDR 0x2ba01477
Info : STM32L152RCTx.cpu: external reset detected
Info : accepting 'gdb' connection on tcp/3333
Info : Device: STM32L1xx (Cat.3 - Medium+ Density)
Info : STM32L flash size is 256kb, base address is 0x8000000
Warn : GDB connection 1 on target STM32L152RCTx.cpu not halted
undefined debug reason 8 - target needs reset
Info : stlink_dap_op_connect(reconnect)
Info : SWD DPIDR 0x2ba01477
Info : STM32L152RCTx.cpu: external reset detected
Info : stlink_dap_op_connect(reconnect)
Info : SWD DPIDR 0x2ba01477
Info : STM32L152RCTx.cpu: external reset detected
Info : stlink_dap_op_connect(reconnect)
Info : SWD DPIDR 0x2ba01477
Info : STM32L152RCTx.cpu: external reset detected
Info : stlink_dap_op_connect(reconnect)
Info : SWD DPIDR 0x2ba01477
Info : STM32L152RCTx.cpu: external reset detected
Info : stlink_dap_op_connect(reconnect)
Info : SWD DPIDR 0x2ba01477
Info : STM32L152RCTx.cpu: external reset detected
Info : stlink_dap_op_connect(reconnect)
Info : SWD DPIDR 0x2ba01477
Info : STM32L152RCTx.cpu: external reset detected
Info : stlink_dap_op_connect(reconnect)
Info : SWD DPIDR 0x2ba01477
Info : STM32L152RCTx.cpu: external reset detected
Info : stlink_dap_op_connect(reconnect)
Info : SWD DPIDR 0x2ba01477
Info : STM32L152RCTx.cpu: external reset detected
Info : accepting 'gdb' connection on tcp/3333
Warn : GDB connection 2 on target STM32L152RCTx.cpu not halted
undefined debug reason 8 - target needs reset
undefined debug reason 8 - target needs reset
shutdown command invoked
Info : dropped 'gdb' connection
shutdown command invoked
2023-12-10 07:14 AM
It was late and I wrote external interrupt, not external reset. That was my mistake. I have slimmed my code down to a loop that toggles an output. There is no watchdog. As suggested I did not call HAL_Init() or SystemClock_Config() and I saw no external resets. When I said there were no pulses, I meant that NSRT does not go low at the time of the external reset. If I call Hal_Init(), I will get an external reset. So it appears that there is something in that module which is causing the reset. The documentation says that the external reset bit is set only by NRST going low. But I have verified that is not happening. Do you know what other conditions can cause that bit to be set?
2023-12-10 07:25 AM
If the signal is not going low, it suggests it's something else. If triggered it should be clamped low, at least briefly.
The bit might be sticky from the initial power-up reset. You're implying that it keeps reentering the Reset_Handler. Or some cyclic behaviour.
Not familiar with your circuit or software.
Suspect power issues, something with SCB->VTOR, or some external GPIO connectivity.
Bisect the code, determine what specifically in HAL_Init(), etc is triggering the cyclic behaviour.
2023-12-11 08:53 AM
Right now I am just going into an infinite loop when I get a reset. I've tracked the problem down to a statement in HAL_InitTick(). It appears to be the HAL_SYSTICK_Config call in the section of code below. If I replace that call with a true condition, then I do not get any external resets. I've also included my schematic and main.c from the program I am using to work this problem. Your help is much appreciated.
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) == 0U)
{
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
uwTickPrio = TickPriority;
}
else
{
status = HAL_ERROR;
}
2023-12-11 09:34 AM
Make sure BOOT0 is pulled LOW, not HIGH/MID-POINT
Check value in SCB->VTOR, should get set to 0x08000000 in SystemInit()
Not sure of TickPriority setting here, should really be highest priority for the HAL to work properly. Check stm32l1xx_hal_conf.h
You also need a viable SysTick_Handler() in stm32l1xx_it.c
2023-12-11 12:08 PM
That seems to have taken care of the problem.
2023-12-11 01:46 PM
Which?
2023-12-11 01:58 PM
Pulling BOOT0 low. Thanks for all your help.