STlink V3 connections.

[CSopk.1]

I want to be sure of the interconnects between the STlink and STM32 that will give me full debug capability using the CUBEIDE development environment. It would require 4 connections; 3.3v,gnd, SCLK(PA13) and SDIO(PA14). Some STM docs identify two additional signals NRST and TRACESWO. As I understand it the two additional signals are not necessary for full debug. Please confirm thanks.

[Tesla DeLorean]

If you expect "Connect Under Reset" to work and allow you to recover the device if you power down or change pin configuration, then connect NRST

SWO (PB3) provides for a debug communications channel, a bit like a USART, good for diagnostic purposes.

If designing a board, far easier to just use a standard connector, ARM defines a few formats in common use, the 2mm 10-pin one being relatively small and readily available.

[CSopk.1]

I am very space constrained so a connector is not an option. All I have room for are flying lead connections to solder pads. So 4 connects have an advantage.

Anyone else know for sure if the 4 connect method works for full debug capability?

[TDK]

STM32CubeIDE assumes it has control of NRST by default. I would consider that pin required for "full debug". I would also consider SWO required for "full debug".

[CSopk.1]

Good answer thanks. If I might, the STM32G473ME6TR in a wlcsp81 package does not identify JTAG pins NRST and SWO only SCLK and SDIO. Do you know the NRST and SWO pinouts?

[TDK]

Why JTAG?
ST-Link typically uses SWD. NRST is NRST. SWO is PB3.
JTAG and SWD are two separate programming methods.

[CSopk.1]

What is SWD?

[MJohn.10]

The STLINK-V3SET is a modular stand-alone debugging and programming probe for the STM8 and STM32 microcontrollers. It is composed of a main module and a complementary adapter board. ... The modular architecture of STLINK-V3SET enables to extend its main features through additional modules such as the adapter board.

[TDK]

Serial Wire Debug

[CSopk.1]

Thanks