2023-05-28 11:55 PM
We connect STLINK/V2 to STM32G071 with 3 wires : SWDIO, SWCLK and GND. It always failed to connect. However, we can connect by using JLINK. We notice that STM32G071 combines the boot0 with SWCLK. Does this make STLINK/V2 failed to connect ? How can we fix this problem ? Thanks.
Solved! Go to Solution.
2023-05-29 01:43 AM
Sorry, problem fixed. It is due to a hardware mistake. We put a capacitor instead of pull down resistor for the boot0 signal.
2023-05-29 01:43 AM
Sorry, problem fixed. It is due to a hardware mistake. We put a capacitor instead of pull down resistor for the boot0 signal.
2023-05-29 02:22 AM
Hi @MHo.15 ,
I don't think that this is the reason otherwise you should have the same issue with the JLINK (both are using SWD protocol).
BOOT0 pin shares the same GPIO with serial wire clock (SWCLK) that is used by the debugger to connect with the device, based on the fact that these functionalities can be considered almost completely disjoint. Nevertheless, to ensure system robustness, the STM32G0x1 devices provide an hardware mechanism to force BOOT0 low (boot from User Flash memory) if a debugger access is detected (and BOOT0 information is taken from the pin), in order to use SWCLK clock for debugger serial communications and at the same time have a safe boot configuration for the device itself. This configuration is kept until next power-on following debugger access.
Did you try a firmware update of the STLINK?
Did you try to change the STLINK frequency?
Best regards,
A.MVE