2022-01-14 02:21 AM
Hi,
we have a PHY with several bootstraps. Some of them are shared with the RMII from a STM32H753 (see image below, controller is on the left).
A FreeRTOS+TCP network stack is used, which, when rebooted, first does some low level inits with HAL_ETH_Init(), an then resets the PHY (to do some other configs).
My concern is the following: What happens to the RMII responsible GPIOs (like RMII_CRS_DV) after HAL_ETH_MspInit()? I fear that there might be some undefined logic level, which interfere with the pullups/bootstraps, thus putting the PHY into a wrong config. The problematic pin PA7 (=RMII_CRS_DV) is configured like this in HAL_ETH_MspInit():
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
I only read in the Contoller Overview for the STM32H753, that
"After reset, all GPIOs (except debug pins) are in Analog mode to reduce power consumption". Has anyone a similar document or reference, which clears things up?
Thanks in advance for your help!
2022-01-14 05:39 AM
You don't necessarily have to use the problematic code. Simply write your own, where pins' initialization happens only after the PHY has been reset.
JW
2022-01-15 09:32 AM
CRS_DV is a receive pin and an input on MAC side. Therefore it will not overpower the level set by R6 pull-up resistor.
2022-01-18 06:58 AM
Thanks for your reply. I'm just kind of confused, since the GPIOs are configured as push-pull. But according to the datasheet of the H7, you are right: