2024-05-07 05:54 AM
I tried to reset the DFSDM1 Peripheral for two days using the STM32H7A3ZI and STM32Cube FW_H7 V1.11.1 (If that's important)
I want to Change OversamplingRatio and RightBitShift during the run of my program.
Apparently you do this by calling:
MX_DFSDM1_Init();
if(HAL_DFSDM_ChannelDeInit(&hdfsdm1_channel0) != HAL_OK){
Error_Handler();
}
if(HAL_DFSDM_ChannelDeInit(&hdfsdm1_channel1) != HAL_OK){
Error_Handler();
}
if(HAL_DFSDM_ChannelDeInit(&hdfsdm1_channel3) != HAL_OK){
Error_Handler();
}
if(HAL_DFSDM_FilterDeInit(&hdfsdm1_filter0) != HAL_OK){
Error_Handler();
}
if(HAL_DFSDM_FilterDeInit(&hdfsdm1_filter1) != HAL_OK){
Error_Handler();
}
if(HAL_DFSDM_FilterDeInit(&hdfsdm1_filter3) != HAL_OK){
Error_Handler();
}
__HAL_RCC_DFSDM1_CLK_ENABLE();
__HAL_RCC_DFSDM_FORCE_RESET();
__HAL_RCC_DFSDM_RELEASE_RESET();
__HAL_RCC_DFSDM1_CLK_ENABLE();
MX_DFSDM1_Init();
I tried to experiment with the CLK_ENABLE(); because another Post mentioned a possible Bug in 2021.
Without resetting and Deinit/Reinit my DFSDM with DMA works normally and it writes to the array, i start the DFSDM using this:
HAL_DFSDM_FilterRegularMsbStart_DMA(&hdfsdm1_filter0, getMainStorageCH1(), 40000);
HAL_DFSDM_FilterRegularMsbStart_DMA(&hdfsdm1_filter1, getMainStorageCH2(), 40000);
HAL_DFSDM_FilterRegularMsbStart_DMA(&hdfsdm1_filter3, getMainStorageCH3(), 40000);
the get Function return int16_t* to the Array. I use Oversampling of 512 and RightBitShift of 4
(but it shouldn't matter). No Error occurs when re-initializing, but the DFSDM doesn't write the Array
and doesn't fire ConversionHalf/Full Interrupts. I made Screenshots of the registers:
Caption describes what was before and after Reset. I see a difference in some Registers but i dont want to spend days again learning the registers and how they work. Does anyone have a solution or is there another way to change Oversampling Ratio and Right Bit Shift without restarting the controller?
2024-07-03 04:26 AM
Hi, I have the same problem on STM32L476. I tried to reset the DFSDM module in RCC but no success. Once I clear the DFEN bit the module stops working.
2024-07-03 05:04 AM
This could be caused by the shared clock being initialized/deinitialized by these functions.
Like mentioned in this post.
You could try to add something like this:
if(DFSDM1_Init != 0) // Make sure to not execute DFSDM1_Init--; if == 0 (=0xFFFF FFFF)
{
DFSDM1_Init-- ;
}
In your functions HAL_DFSDM_FilterMspDeInit and HAL_DFSDM_ChannelMspDeInit:
void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef* dfsdm_filterHandle)
{
if(DFSDM1_Init != 0) // Make sure to not execute DFSDM1_Init--; if == 0 (=0xFFFF FFFF)
{
DFSDM1_Init-- ;
}
if(DFSDM1_Init == 0)
{
/* USER CODE BEGIN DFSDM1_MspDeInit 0 */
/* USER CODE END DFSDM1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_DFSDM1_CLK_DISABLE();
/**DFSDM1 GPIO Configuration
PD6 ------> DFSDM1_DATIN1
PD3 ------> DFSDM1_CKOUT
PE4 ------> DFSDM1_DATIN3
PD7 ------> DFSDM1_DATIN4
*/
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_6|GPIO_PIN_3|GPIO_PIN_7);
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_4);
/* DFSDM1 DMA DeInit */
HAL_DMA_DeInit(dfsdm_filterHandle->hdmaInj);
HAL_DMA_DeInit(dfsdm_filterHandle->hdmaReg);
/* USER CODE BEGIN DFSDM1_MspDeInit 1 */
/* USER CODE END DFSDM1_MspDeInit 1 */
}
}
void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef* dfsdm_channelHandle)
{
if(DFSDM1_Init != 0) // Same verification here !
{
DFSDM1_Init-- ;
}
if(DFSDM1_Init == 0)
{
/* USER CODE BEGIN DFSDM1_MspDeInit 0 */
/* USER CODE END DFSDM1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_DFSDM1_CLK_DISABLE();
/**DFSDM1 GPIO Configuration
PD6 ------> DFSDM1_DATIN1
PD3 ------> DFSDM1_CKOUT
PE4 ------> DFSDM1_DATIN3
PD7 ------> DFSDM1_DATIN4
*/
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_6|GPIO_PIN_3|GPIO_PIN_7);
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_4);
/* USER CODE BEGIN DFSDM1_MspDeInit 1 */
/* USER CODE END DFSDM1_MspDeInit 1 */
}
}
This should avoid init/deinit clock conflicts.
Hope that will help.
Sulian