Design Considerations for High-speed SDMMC Transactions?

[PhucXDoan]

So far I can do 4-bit wide 24MHz read/write transactions on two microSD cards I have on hand, and I'm looking forward to doubling this to 48MHz. I'm pretty sure the cards I have can support this, as I handle the SWITCH_FUNC command to make sure they support High-Speed mode, but upon setting the BYPASS bit after the initialization routine, I get nothing but CRC mismatches. I'm somewhat certain that the BYPASS bit is indeed doing what it's supposed to and that the clock output is 48MHz, but it's hard to measure this with my Analog Discovery. Doing a spectrum analysis shows a peak around that 48MHz frequency, but the probing is pretty intrusive.

So I think the next step is to improve the signal integrity significantly. I'm working on a NUCLEO-L476RG, and I originally had a hand-soldered proto-board acting as a shield to equip my setup to having a USB port and microSD card slot. It worked fine, but going into 24MHz territory was a little unreliable. I then replaced it with a PCB I designed and it's been pretty reliable since, but I think there are some areas for improvement.

For one, I'm currently using a breakout board for the microSD slot for the sole reason of convenience. I've gotten around to being able to do some SMD soldering basic components like resistors and capacitors, but I think in the next revision of the PCB board I'll need to figure out a way to hand solder a microSD card slot myself. I don't know if doing this alone will make it possible to do 50MHz transactions, but I can't imagine it'd hurt either.

Second is the fact that I'm using a shield design at all. I'm no expert on PCBs, but I heard enough to know that longer traces, routes, return currents, etc. will make it harder to control and guarantee signal integrity and EMI. Perhaps if I grow up from the NUCLEO and make a single board with all the things I need, things will be a lot better. This costs money and time and a lot of researching however, so I'm not exactly keen on jumping to this solution until the end of the project where design considerations have settled down.

But other than that, I'm not entirely too sure what else I could possibly do to improve the signal integrity, let alone measure it. Setting the BYPASS bit jumps from 24MHz to 48MHz, so I can't even really test if 30MHz works fine before vs. after. Perhaps I could reconfigure my clock setup to change SDMMCCLK to some non-48MHz frequency, but who knows what that might break...

Any PCB design guidance and tips that'd help with this would be appreciated.

[TDK]

You've got it right--likely interference is the issue when you're jumping to 48 MHz over jumper wires.

> Perhaps I could reconfigure my clock setup to change SDMMCCLK to some non-48MHz frequency, but who knows what that might break...

You can do this, the hardware can handle it just fine. Nothing special about 48 MHz (apart from that's the max the spec allows in some cases). You can also set the clock such that it hits 24 MHz with the BYPASS bit set (instead of 48 MHz), to convince yourself that isn't the problem. I don't know if CubeMX will complain about this, but the STM32 hardware can do it just fine.

> Any PCB design guidance and tips that'd help with this would be appreciated.

Keep traces short. Keep trace lengths similar. Within a cm or so is fine for 48 MHz.