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Ambiguity in board+pin parasitic capacitance assumption

YPath
Associate II

Hi,

I am trying to calculate the oscillator parameters for STM32L433RBT6 microcontroller. I referred the STM32l433xx datasheet as well as the "AN2867 Oscillator design guide for ST microcontrollers" application note. 

The STM32L433xx datasheet provides the current flowing through the crystal at 2 different motional resistances (30ohm and 45ohm) for 8MHz frequency and CL=10pF in Table 56. HSE oscillator characteristics (STM32l433xx datasheet, Pg: 131/125). I require the current value as it is vital for calculating the drive level and hence the external resistance required without conducting experiments after assembling the board.

The confusion stems from the paragraph succeeding the table where it is mentioned that the stray capacitance of the board and MCU pins, Cs, has to be assumed equal to 10pF, which means that the load capacitance of crystal has to be greater than 10pF because in the same paragraph, it is mentioned that parallel load capacitors, C1 and C2, have to be 5-20pF in magnitude.

Could someone clarify what does the “CL�? in the table indicate? Also, what should be the load capacitance of the crystal (10pF or greater than that)?

PFB screenshots of the table and the paragraph succeeding it.

0690X000009YxbeQAC.png0690X000009YxbZQAS.png

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