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ST25R3918 NFC read power optimzation

BillR
Associate III

Hi,
we're working with the ST25R3918-AQWT in a design that's powered by a CR2054 coin cell. We're trying to minimize the peak current draw through the NFC coil since right now we're seeing about a 500mV droop on VBAT during our NFC read. 

We've already configured the output resistance to the highest setting but we're still seeing peak current spikes that are higher than we’d like. Our main concern is an effective reduction in battery life if the voltage droops enough to brown out the ST25R3918 whenever the field turns on. Are there any other settings or hardware design choices we can make to reduce the total energy used during an NFC read? 

Additional information:

  • Our overall field-on time is 10msec. We believe this is about as fast as we can make an NFC transaction
  • On our application, the NFC tag is a fixed distance from the ST25R3918. Currently we have about 2-3x more range than we need. 
  • We already have about 1200uF of capacitance on VBAT to help with this voltage droop issue

  • Changing the TX modulation to 5% and maximum driver resistance to max. did help already, reducing the drop by 100mV. 

     

  • Attached is a capture of the VBAT droop during an NFC read

    BillR_0-1747853463945.png

     

    BillR_1-1747853690711.png

    Current draw during the NFC read. 


    Thanks for any ideas you have, Bill. 

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