ST25R3918: Excess current in Power-Down mode with I2C_EN HIGH (I²C mode); resolved by switching to SPI

[BillR]

Hi ST team,

We’re using the ST25R3918 in a low-power BLE+NFC product. During testing, we noticed unexpected ~10 µA additional current draw when the chip was in Power-Down mode (with all VDD rails active), despite expecting ~1–2 µA per the datasheet.

After isolating all possible causes, we found this behavior:

• With I2C_EN pulled HIGH (selecting I²C mode), total current in power-down mode is ~13 µA

• With I2C_EN pulled LOW (SPI mode), current drops to ~3 µA

• No I²C or SPI traffic is active at this point — chip is just powered and sitting in default state after POR, even with lines cut.

This behavior seems to suggest that I²C mode selection (I2C_EN = HIGH) may keep some internal circuitry partially active, even in Power-Down mode.

We’ve decided to move back to SPI mode (LOW), which solves the issue and also allows faster data transfer and shorter NFC "on-time."

1. Is this increased current draw in Power-Down mode with I2C_EN = HIGH expected?

2. Is there any internal I²C block or biasing circuitry that could be responsible for this?

3. Would ST recommend SPI mode for lowest sleep current designs?

Thanks, Bill

[Brian TIDAL]

Hi Bill,

according to the ST25R3918 Datasheet, for I2C operation, I2C_EN should be pulled to VDD_D (not to VDD or VBAT):

This may be the cause of the extra current consumption in PD mode. 

Also, what is the value of the pull-up resistors on the I2C-SCL and I2C-SDA?

For your information, new devices such as ST25R200 and ST25R300 feature a reset mode controlled by a RESET pin. In reset mode, the device is disabled, and power consumption is minimal.

Rgds

BT

[BillR]

Hi Brian, ok yeah there always seems to be some 'asterisk' in the datasheet we miss. Anyway, we ended up freeing a nordic pin so we can go back to SPI anyway, and the faster interface the better so its just as well. 

Thanks!