2025-05-14 4:56 AM
We have approximately fifty modules in the field that use the L6981CDR. The schematic below shows how they are connected. The L6981CDR is used (in combination with other components) to generate an output voltage of 5V. This output voltage is used to power our system. Our system draws a maximum of 700mA from the buck converter. However, most of the time, the current draw is around 5mA in "sleep" mode and 200mA when the system is "awake."
After conducting tests with the buck converter, it seemed to work well, so we put it into production. However, we are now finding that about 5-10% of the systems are returning with the issue that the output voltage of the buck converter stops working after a few days. We measure an output voltage of 0V at the output of the buck converter (point +5V in the schematic) and the current draw is approximately 0mA. We also checked the EN/CLK pin of the L6981CDR, where 12V was present (with a supply voltage of 12.6V). The VIN voltage was also correct. Additionally, we looked at the SW output and saw no pulses, as we normally see with a buck converter. After this phenomenon occurred, we removed and reapplied the supply voltage, and the buck converter worked again.
The cause of this issue is still unknown to us. We have not been able to identify any logic behind it. It occurred in one system after 5 days, but in another system, it happened after just an hour and then did not occur again.
Does anyone have a solution or suggestions for this?
Below are the components we used:
Schematic buck-converter
Top layer
Bottom layer
2025-05-14 2:05 PM
Welcome @OnRoute, to the community!
Your layout actually looks good apart from GND, and no problem if L3 is completely magnetically shielded, which I can't see clearly from the data sheet of the 744393305220. If this is not the case, the FB track is routed unshielded and too close to L3, which can lead to control problems.
In your case, PGND is connected to a large GND area that completely surrounds the switching regulator. However, a good design connects PGND to the input and output capacitors with the lowest possible impedance and separately from the other GND, which are then connected together via vias to a GND on another layer.
A quick simulation of your circuit with the eDesignSuit also recommends the use of 39µH instead of the 22µH used. Then the ripple current also remains below the recommended 210mA, with 22µH it is more than twice as high. The simulation also recommends a capacitor of 10pF in parallel with R59, which improves the control speed.
In my opinion, however, none of the points offer sufficient reason for a total shutdown of the regulator; I can only imagine a latch-up effect, the reason for which is currently not recognisable here.
Regards
/Peter