How to set up the SPI communication with powerSTEP01

[SJank.3]

Hi beloved friends of software architecture,

i try to programm an SPI communication protocol of an STM32F373CCT6. It should communicate to the powerSTEP01 in order to move a motor. The problem is that i dont get any answer of the powerSTEP01. Did i do anything wrong with my SPI communication setup?

I try to do so using the following conditions:

1. Maximum clock speed of the SPI is 5 MHz, so i chose 1 MHz with a prescaler of 4 to the bitrate, so i am at 250 kBits/s.
2. I use SPI Mode 0, so i trigger on the first rising edge. (clock polarity (CPOL) is set on low and clock phase (CPHA) is set on the first edge).
3. The Datasize is configured to 8 bits.
4. And i use the MSB (most significant bit) first as described in the powerSTEP01 datasheet.
5. Also in the datasheet of the powerSTEP01 is that you have to pull down your CS pin of the powerSTEP01 and pull it back to high after each byte of transmision for at least 625 ns.
6. The nSTBY/nRESET Pin has to be set high in order to activate the powerSTEP01

Thank you for your help in advance here is my SPI protocol code:

 HAL_GPIO_WritePin(GPIOF, GPIO_PIN_6, GPIO_PIN_SET); //nSTBY/nRESET Pin is set

 HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_SET); //SPI_CS Pin set (When CS is high the device is unselected and the SDO line is inactive)

 HAL_Delay(100);

 HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_RESET); //SPI_CS Pin reset

 HAL_SPI_Transmit(&hspi1, &value_config_set[5], 1, 100);

 HAL_SPI_Receive(&hspi1, &value_config_set[2], 1, 100);

 HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_SET); //SPI_CS Pin set

 HAL_Delay(100);

 HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_RESET); //SPI_CS Pin reset

 HAL_SPI_Transmit(&hspi1, &value_config_set[4], 1, 100);

 HAL_SPI_Receive(&hspi1, &value_config_set[1], 1, 100);

 HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_SET); //SPI_CS Pin set

 HAL_Delay(100);

 HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_RESET); //SPI_CS Pin reset

 HAL_SPI_Transmit(&hspi1, &value_config_set[3], 1, 100);

 HAL_SPI_Receive(&hspi1, &value_config_set[0], 1, 100);

 HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_SET); //SPI_CS Pin set

 HAL_Delay(100);

 HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_RESET); //SPI_CS Pin reset

 HAL_SPI_Transmit(&hspi1, &value_config_get[5], 1, 100);

 HAL_SPI_Receive(&hspi1, &value_config_get[2], 1, 100);

 HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_SET); //SPI_CS Pin set

 HAL_Delay(100);

 HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_RESET); //SPI_CS Pin reset

 HAL_SPI_Transmit(&hspi1, &value_config_get[4], 1, 100);

 HAL_SPI_Receive(&hspi1, &value_config_get[1], 1, 100);

 HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_SET); //SPI_CS Pin set

 HAL_Delay(100);

 HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_RESET); //SPI_CS Pin reset

 HAL_SPI_Transmit(&hspi1, &value_config_get[3], 1, 100);

 HAL_SPI_Receive(&hspi1, &value_config_get[0], 1, 100);

 HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_SET); //SPI_CS Pin set

 HAL_Delay(100);

[Cristiana SCARAMEL]

Hi @SJank.3​ ,

concerning the point 2 (with reference to the Figure 25 of powerSTEP01 datasheet) the device uses a SPI Mode 3 (CPOL=1, CPHA=1).

Let me know if this info solves your issue.

[SJank.3]

Hi Cristiana, thank you for your answer, SPI Mode 3 doesnt solve my problem but thank you for your help to understand that Figure 25. It is one more step in the right direction i guess^^
I tried to set the configuration register of the powerSTEP01 and for this i am using the SetParam() command which(from my point of view, the datasheet is a little bit confusing) consists of the write part 000 and the Hexaddress 11010. These combined gives me an 8 bit command 0b00011010 == 0x1A. After this byte i send two more bytes to change the config register of the powerSTEP01.

After that i want to read the config register back and want to see if i changed something. I do this with GetParam() which is 0b00111010 == 0x3A and two more received bytes which should show the config register configuration in the two bytes over the yellow arrays.

[SJank.3]

why do you think the device uses SPI Mode 3 ? Because in the description above the Figure 25 it is mentioned: "The SDI is sampled on the rising edges of the CK.The SDO is latched on the falling edges of the CK."

[Cristiana SCARAMEL]

Hello @SJank.3​,

if we exclude a SPI configuration or CS signal management problem, the only remaining is the code.

I can only suggest to share with us the SPI signals behavior using a logic analyzer.