Could I able to control the STEF01 e-Fuse from an FPGA and its return path is not common to the VCC and Vout

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Hi,

We are using STEF 01 e-Fuse in our design. In that EN pin is controlling through an FPGA but its return path is not common to VCC and VOUT.

Please let me know the design will work ?

Below I have attached the design approach image.

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Please find the attachment

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Please help us to resolve the issue as soon as possible