Writing to M24M02E-F EEPROM

TDJ · ‎2024-08-20

Hi ST,

I have some doubts related to writing to M24M02E-F EEPROM.
DS14157 (Rev 1 - December 2023) in section "6.1.2 Page write" states:

1. "The page write mode allows up to 256 bytes to be written in a single write cycle"
How is this achievable since the first two bytes are used for memory address and typically no more than 255 bytes total can be send over I2C in a single cycle? If I am correct, actually only 253 memory bytes can be written in one cycle. Please confirm/clarify.

2. "After each transferred byte, the internal page address counter is incremented."
How is this relevant? How the internal page address counter can be used during write operation? Does it potentially affect read operations only?

3. It is completely unclear to me what section "6.2.6 Minimizing write delays by polling on ACK" tries to explain.
Is it some way to continue write operation without resending memory address? Unfortunately, it seems that it is possible only when reading data.

Peter BENSCH · ‎2024-08-20

"The page write mode allows up to 256 bytes to be written in a single write cycle..." in section 6.1.2 means the net written bytes, i.e. the pure data bytes.

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Andrew Neil · ‎2024-08-20

@TDJ wrote:
typically no more than 255 bytes total can be sent over I2C in a single cycle? .

Where do you see that limitation?

@TDJ wrote:
2. "After each transferred byte, the internal page address counter is incremented."
How is this relevant? .

It's just telling you that you send one address, for the first byte, and the chip itself manages getting the subsequent bytes into subsequent addresses.

Peter BENSCH · ‎2024-08-20

"The page write mode allows up to 256 bytes to be written in a single write cycle..." in section 6.1.2 means the net written bytes, i.e. the pure data bytes.

In order to give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

TDJ · ‎2024-08-20

@Andrew Neil Although, I think, the 255B limit is not part of the I2C specs, all the ST MCUs I came across have this hardware limitation since the internal I2C interface byte counter (I2C_CR2.NBYTES register) is 8 bit only.

Andrew Neil · ‎2024-08-20

I see.

But that's just a limitation of the STM32 - nothing to do with the M24M02E-F EEPROM.

How to get around the limitation:

TDJ · ‎2024-08-20

@Andrew Neil Thanks for pointing this out. It was not a must, but it was was a good motivation to improve my i2c driver. Now the whole thing works like a dream.