Using Clock in PLD
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‎2004-09-15 6:35 AM
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‎2011-05-17 3:02 AM
Posted on May 17, 2011 at 12:02
Is there any way to access the CLOCK as a elegable signal when defining logic equasions in the PLD of upsd micro?
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‎2011-05-17 3:02 AM
Posted on May 17, 2011 at 12:02
uPSD33xx Preliminary Datasheet (May 2004) page 154 “Table 80. DPLD and GPLD input� shows all the input signals that can be used. Which CLOCK signal do you want to use and what for?
