Halt Mode

[shermantec]

Posted on February 20, 2004 at 01:32

Halt Mode

[shermantec]

Posted on February 17, 2004 at 06:29

Hello

We need to wake-up the ST7Superlite an the lowest power mode - Halt to Run mode within less then 10usec . The operation will be using internal RC OSC no need for PLL function . Pl's advice worst case Tstartup . Thanks Latino

[jatin]

Posted on February 20, 2004 at 01:32

When cpu exits the halt mode, the internal oscillator is immediately startup and then it takes 256 cpu clock cycles i.e. the clock stabilization time plus the vector fetch time(10 cpu cycles).

Note: If the PLL is on, then you also have to take into account the PLL startup time.