2025-12-15 11:20 PM - edited 2025-12-15 11:22 PM
Hardware / DT:
I’m using ST M24M02DR (2 Mbit I²C EEPROM, page size 256 bytes, write cycle ~10 ms per byte/page) at 400 kHz. Device tree:
eeprom@50 {
compatible = "st,m24m02-dr", "atmel,24c2048";
reg = <0x50>;
pagesize = <256>;
num-addresses = <4>;
}Observation in Linux driver (at24):
In drivers/misc/eeprom/at24.c, the driver uses an I/O transfer limit (at24_io_limit) to avoid holding the I²C bus for too long. That limit is 128 bytes, enforced as a power-of-two so writes align with pages:
Problem:
On M24M02DR, if the kernel keeps sending 128‑byte chunks, I end up with two write cycles per page instead of one, and EEPROM might consider it as byte write effectively halving write throughput. The device itself supports 256‑byte page writes at 400 kHz and 1 MHz.
Questions:
2025-12-16 2:12 AM
Welcome @kishoresmart, to the community!
The question is more of a general question for the Linux kernel and its maintainers than one that STMicroelectronics can answer. I'll give it a try anyway:
The 128-byte limit was introduced to prevent bus overload of the system. At that time, EEPROMs with smaller page sizes were very common.
If you still want to work with a page size of 256 bytes for reasons of higher throughput, you must first check whether your kernel supports at24_io_limit as a module parameter.
Your second question mainly relates to the first reason mentioned: bus problems can certainly occur if you work with larger page sizes than the original 128 bytes, which can potentially hinder the system considerably more than sticking to two transfers per page. Ultimately, in your specific case, you will have to determine for yourself what the best approach is for you.
Hope that helps?
Regards
/Peter
2025-12-16 6:43 AM
Thank you, Peter, for the response. I think changing the driver code could work, but that's not recommended. However, I have a question about the M24M02DR—I hope this is the right place to ask.
My question is: When I write 128 bytes instead of the full page size of 256 bytes, does the EEPROM consider it as a byte write?
Also, is there a difference between page read and byte read operations? I believe reads should work at the same speed regardless of size, but I'm asking because I noticed in the kernel code that it performs page reads when I try to read more than the page size.
2025-12-16 8:33 AM - edited 2025-12-16 8:42 AM
A page write can comprise 1...256 bytes in the M24M02DR, as described in section 5.1.2 of the data sheet, whereby this byte block is written from the specified address. If the kernel writes 128-byte chunks and writes them per page from the beginning and middle of the page, two page writes are required.
There are indeed differences between page reads and byte reads, as the M24 I2C EEPROMs require a lot of overhead in the form of address data for each data transfer. If bytes are addressed as pages, this overhead only needs to be sent for the first byte of the page; the remaining bytes are automatically incremented internally. This is probably why the kernel uses page reads when more than one page needs to be read.
However, I would like to point out that the M24M02DR is already set to NRND (Not Recommended for New Design), so you should take a look at the possible alternative M24M02E-F.
Regards
/Peter