120Mhz emissions from SDIO pins

PCudd · ‎2021-05-26

We are getting massive ammounts of emissions from the D0 SDIO pin with 120mhz and resonant freqs. The pins for SDIO have been set to AF but nothing else has been setup register wise yet, the circuit was taken from the appnotes with the 3v3 pullups on D0,1,2,3,CMD

APB2 periph is 60mz

APB2 timer 120mhz

Javier1 · ‎2021-05-26

@PCudd

How about you show us your PCB layout or something.

What does AF mean?

How do you know the noise is comming from the SDIO pins?

Available for consulting/freelancing , hit me up in https://github.com/javiBajoCero

PCudd · ‎2021-05-26

Hi Javier, Thank you for the reply.

Alternate Function for the SDIO pins in the GPIO MODE Registers

top and bottom copper

Ground plane in between

We probed the pins with an analyzer this is directly probing the D0 pin

This is probing both pins next to D0

Ozone · ‎2021-05-26

Besides of possible configuration and wiring issues with the SDIO pin, the PCB track seems to function as a perfect antenna for said frequencies, i.e. length and impedance matching seem to favour such transmissions.

Javier1 · ‎2021-05-26

wow,

no idea of where the SDIO pins are in your pcb, but it looks like a noise playground for high frequencies.

Is this a new problem? Or have you been using SDIO withour problems untill now?

Available for consulting/freelancing , hit me up in https://github.com/javiBajoCero

PCudd · ‎2021-05-26

I tried to highlight the D0 net in light blue goes to the SD socket on top with the red arrow.

This is a new PCB design and the first time we have tried SDIO

PCudd · ‎2021-05-26

Do you suggest keeping the track lengths to a minimum?

Javier1 · ‎2021-05-26

ah yes i see them now.

Im not an expert aboutPCB routing, did you followed any design rule?

Like length matching , smooth angleless shapes or clearance between traces

Available for consulting/freelancing , hit me up in https://github.com/javiBajoCero

PCudd · ‎2021-05-26

Yes, we go through a DRC before releasing the board.

The EMC engineer we spoke to at the test facility implied that there is something fundamentally wrong,

as the emission levels are huge and could not be contained even by enclosing the PCB in a metal cage.

Could it be the lack of setup of the SDIO registers is causing this?

Javier1 · ‎2021-05-26

>Could it be the lack of setup of the SDIO registers is causing this?

So youre not using SDIO but the noise is comming from the SDIO pins?

Available for consulting/freelancing , hit me up in https://github.com/javiBajoCero