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uPSD3212C ADC flaw

wek2
Associate II
Posted on November 18, 2005 at 10:19

uPSD3212C ADC flaw

1 REPLY 1
wek2
Associate II
Posted on May 17, 2011 at 12:09

Today I discovered something I think IS a flaw: if AD conversion is started and PSEN is written after a certain number of instruction cycles (8-16), the conversion-end flag gets never set... :-?

Here is the code which stuck:

mov P1SFS,#00010000B ;set p1.4 to be ADCH0

mov ASCL,#1 ;set ADC prescaler

anl ACON,#11110011B

orl ACON,#00100010B ;bit5 - ADEN (AD enable); bits 2,3 - AD channel select (ADCH0), bit 1 = ADST startbit

nop

...

nop ;together 8-16 nops

orl pcon,#0

Loop:

mov a,ACON

jnb acc.0,StartX11 ;bit 0 - if AD conversion finished, set to 1 ;---never gets here

Again, I would be happy if somebody would try and perhaps confirm it.

Jan Waclawek

[ This message was edited by: wek1 on 18-11-2005 14:59 ]