2007-12-05 10:16 PM
2011-05-17 12:48 AM
Hello, I'm experimenting with a couple of eval kits I have here one is an ST912-SK. Everything was going fine until yesterday when my IAR compiler and Jlink stopped working with the board. I keep getting the message ''Unable to halt ARM core'' when I try to enter debug and flash the part. It was working just fine before. I have tried restarting the IAR IDE, Jlink, board, even my PC, it's not doing it.
I was doing some reading and it looks like I might have to use CAPS to erase the flash, just a guess here. I installed CAPS but that looks like it requires different hardware, RLink to be exact, which I don't have. So, any ideas what's wrong with my eval board, or what I can try? Can I use the Jlink in place of the Rlink? The RLink connection test in CAPS fails making me think ''no''. Any help would be greatly appreciated, thanks. -Ken www.infinetix.com2011-05-17 12:48 AM
until IAR releases a better EWARM that supports chip erase, you need to plunk down the $60 for a RLINK and use it to erase the chip.
I think the other option is to buy the full SEGGAR J-Link ARM package (go to seggar's web page), but that is more expensive, and you still can't use CAPS, which is the only way of accessing the esoteric features of the chip, like the OTP.2011-05-17 12:48 AM
I had similar problem with the same environment.
Just a suggestion, try to download on the eval board a sample project from IAR. Just open the workspace, compile and start the debug session, don't do anything else. Regards