2003-04-07 08:29 PM
2003-04-03 01:22 AM
hello.
I want to use timerB to generate an interrupt every 1ms. I try it several times but without success. Here my initialisation of timerB TBCR1 = 0b01000000; TBCR2 = 0b00001000; TBRS = 0b00000000; In Interrupt of timerB: -------------------------------------- int Temp; if((TBSR & 0b01000000) != 0) { #asm ld A,_TBOC1LR add A,#$E3 ld Y,A ld A,_TBOC1HR adc A,#$03 ld _TBOC1HR,A ld A,Y ld _TBOC1LR,A #endasm } Temp = TBOC2LR; ------------------------------------ I use ST72521. Who can help me and can me say if the code is ok? regards, Ampel2003-04-03 03:24 PM
Try this!
void timb_rt(void) { unsigned int timer; if (ValBit(TBSR,6)) { timer=TBOC1HR< timer+=TBOC1LR; timer+= 1000; // int every 1 ms - depends of crystal // & prediviser settings TBOC1HR=timer>>8; TBOC1LR=timer; ... } } Happy programming! F2003-04-03 07:26 PM
Thank you, ''F''.
But is the same code I write only in other words. But now I have another problem with ST72521: I enable all interrupt with ''rim'' but none of this reached. So I searched for a ''initialisation bit'' who enable all interrupts. Is there any bit I can write and all interrupts enable? (PS:sorry,my english is bad...) regards, Ampel2003-04-03 08:25 PM
Hi Ampel,
There are 2 output compare interrupts/timer. You are currently using OCF1 (bit 6 of TBSR)...Do you clear the OCF2 bit by reading the TBOC2LR register? If not, you have to, otherwise the code execution might be frozen. Here's an example: void timb_rt(void) { unsigned int timer; if (ValBit(TBSR,6)) { timer=TBOC1HR< timer+=TBOC1LR; timer+= 1000; TBOC1HR=timer>>8; TBOC1LR=timer; ... } else TBOC2LR; // means read the register and clear OCF2!! } } Please remember that once you have enable the output compare int, both sources (OCF1 & OCF2 event) are enabled: so you have to care of both cases. By the way, for 1 ms delay, using 16 Mhz crystal, you should add 0x3e8 better than 0x3e3. Cheers! Florent2003-04-03 08:45 PM
Ok, I understand. I have this in my code: ''else TBOC2LR; ''
My problem is now another one: All interrupts are enabled with ''rim''. I mean timerA, timerB, EINT0..3, CAN, SCI, SPI, I2C,...... So, if an interrupt is pending, the code of interrupt should be execute. I use the debugger inDART ST7 from SofTecMicrosystems (v.1.11) and my own application. I insert breakpoints to all routines of interrupts and run the application. But nothing happens. I mean: no breakpoint is jumped. I have my code reduced with an empty main loop. And the interrupts are enabled. But nothing happens! I can't find the bug! Is there an problem with initialisation or link command file or anything else I can do wrong? regards, Ampel2003-04-03 09:00 PM
I guess that you have a problem in your .prm/map file...Here's my prm file for the ST72321 (= ST72521 minus the CAN device). Please check it!
LINK example.abs NAMES main.o St72321.o+ /* ''+'' is mandatory !!!! */ inter.o libr.o /* STARTUP */ ansi.lib END STACKSIZE 0xFF SECTIONS BITS_RAM = READ_WRITE 0x0080 TO 0x00FF; MYSTACK = READ_WRITE 0x0100 TO 0x01FF; BYTE_RAM = READ_WRITE 0x0200 TO 0x087F; /* 2K RAM */ USER_ROM = READ_ONLY 0x1000 TO 0xFFDF; PLACEMENT ST7_PA INTO NO_INIT 0x0000 TO 0x0002; ST7_PB INTO NO_INIT 0x0003 TO 0x0005; ST7_PC INTO NO_INIT 0x0006 TO 0x0008; ST7_PD INTO NO_INIT 0x0009 TO 0x000b; ST7_PE INTO NO_INIT 0x000c TO 0x000e; ST7_PF INTO NO_INIT 0x000f TO 0x0011; ST7_I2C INTO NO_INIT 0x0018 TO 0x001e; ST7_SPI INTO NO_INIT 0x0021 TO 0x0023; ST7_ITC INTO NO_INIT 0x0024 TO 0x0028; ST7_FLASH INTO NO_INIT 0x0029 TO 0x0029; ST7_WDG INTO NO_INIT 0x002A TO 0x002B; ST7_MCC INTO NO_INIT 0x002C TO 0x002D; ST7_TIMA INTO NO_INIT 0x0031 TO 0x003F; ST7_TIMB INTO NO_INIT 0x0041 TO 0x004F; ST7_SCI INTO NO_INIT 0x0050 TO 0x0057; ST7_ADC INTO NO_INIT 0x0070 TO 0x0072; ST7_PWMART INTO NO_INIT 0x0073 TO 0x007d; DEFAULT_ROM, ROM_VAR, STRINGS INTO USER_ROM; DEFAULT_RAM INTO BYTE_RAM; _ZEROPAGE, _OVERLAP INTO BITS_RAM; SSTACK INTO MYSTACK; END PRESTART OFF /* INTERRUPT VECTOR SETTING : ADDRESS - ROUTINE */ VECTOR ADDRESS 0xfffe main VECTOR ADDRESS 0xfffc INT_TRAP VECTOR ADDRESS 0xfffa INT_TLI VECTOR ADDRESS 0xfff8 INT_MCC VECTOR ADDRESS 0xfff6 INT_PortA0123 VECTOR ADDRESS 0xfff4 INT_PortF012 VECTOR ADDRESS 0xfff2 INT_PortB0123 VECTOR ADDRESS 0xfff0 INT_PortB4567 VECTOR ADDRESS 0xffee dummy_rt VECTOR ADDRESS 0xffec INT_Spi VECTOR ADDRESS 0xffea INT_TimerA VECTOR ADDRESS 0xffe8 INT_TimerB VECTOR ADDRESS 0xffe6 INT_Sci VECTOR ADDRESS 0xffe4 INT_AVD VECTOR ADDRESS 0xffe2 INT_I2C VECTOR ADDRESS 0xffe0 INT_PWMART /***** End of File **********/ Please check your configuration files as well (default.env, makefile, map file) and your it.c file -> #pragma TRAP_PROC SAVE_REGS before each int routine! Rgds Florent2003-04-03 09:15 PM
Thanks for Your code.
I forget to say I use Cosmic C Compiler. I guess You use Hiware? So i try to understand Your code.2003-04-03 09:33 PM
Here's for COSMIC:
vector.c file: extern void dummy_rt (void); extern void INT_PortB0123 (void); extern void INT_TimerA (void); extern void INT_TimerB (void); extern void INT_PortB4567 (void); extern void INT_TRAP (void); extern void INT_TLI (void); extern void INT_MCC (void); extern void INT_I2C (void); extern void INT_PWMART (void); extern void INT_PortA0123 (void); extern void INT_Spi(void); extern void INT_AVD(void); extern void INT_Sci(void); extern void INT_PortF012(void); extern void _stext(); /* startup routine */ void (* const _vectab[])() = { INT_PWMART, INT_I2C, INT_AVD, INT_Sci, INT_TimerB, INT_TimerA, INT_Spi, dummy_rt, INT_PortB4567, INT_PortB0123, INT_PortF012, INT_PortA0123, INT_MCC, INT_TLI, INT_TRAP, _stext, /* RESET */ }; batch file: @echo off SET OBJPATH=D:\ST72321\OBJECT SET SOURCEPATH=D:\ST72321\SOURCE SET ENVPATH=D:\ST72321\CONFIG cd %SOURCEPATH% rem del %OBJPATH%\*.o del %SOURCEPATH%\*.err cxst7 +modms +debug +split -ov -i %SOURCEPATH% -co %OBJPATH% -e -ce %OBJPATH% -cl %OBJPATH% -v -l crtsi.s vector.c main.c st72c inter.c libr.c if errorlevel 1 goto bad :clink echo. echo Linking ... cd %OBJPATH% clnk -m %ENVPATH%\mapfile.map -o out.st7 %ENVPATH%\link.lkf if errorlevel 1 goto bad :chexa echo. echo Converting ... chex -fm -o final.s19 out.st7 if errorlevel 1 goto bad :cllabs echo. echo Generating absolute listing ... cvdwarf out.st7 out.elf if errorlevel 1 goto bad echo. echo. echo Successful! echo. goto sortie :bad echo. echo. echo Try again! echo. :sortie echo on link file LINK COMMAND FILE FOR TEST PROGRAM Copyright (c) 1998 by COSMIC Software +seg .text -b 0x1000 -n .text program start address +seg .const -a .text -it constants follow code +seg .bsct -b 0x80 -m 0x80 zero page start address +seg .ubsct -n iram uninitialized zero page +seg .data -b 0x200 -m 0x67f -n .data +seg .share -a iram -is -n .share shared segment +seg .data -a .share +seg .bss -b 0x200 -m 0x67f define the .share segment when using compact or memory models only ''C:\COSMIC\CXST7\lib\crtsi.st7'' startup with auto-init crtsi.o startup routine main.o st72o inter.o libr.o define the .share segment when using compact or memory models only +seg .share -a iram -is shared segment float and integer library names depend on the model used ''C:\COSMIC\CXST7\lib\libims.st7'' ''C:\COSMIC\CXST7\lib\libm.st7'' +seg .const -b 0xffe0 -k vectors start address vector.o interrupt vectors define these symbols if crtsi or crtsx is used +def __endzp=@.ubsct end of uninitialized zpage +def __memory=@.bss end of bss segment Hope it's gonna be successful this time... Rgds Florent2003-04-03 10:23 PM
Ok, I checked it. There some differenz to my code, but not seriously.
Here my ini of the registers (except CAN-registers (I don't know how)): PADDR = 0b11111000; PAOR = 0b00111000; PBDDR = 0b00011111; PBOR = 0b01011111; PCDDR = 0b10101111; PCOR = 0b10101111; PDDDR = 0b00111000; PDOR = 0b00111000; PEDDR = 0b11110000; PEOR = 0b11110000; PFDDR = 0b11111110; PFOR = 0b11111110; I2CCR = 0b00000000; // I2C Control Register 1 SPICR = 0b00101100; // SPI Control Register ISPR0 = 0b10101011; // Register 0 ISPR1 = 0b10100110; // Register 1 ISPR2 = 0b10010010; // Register 2 ISPR3 = 0b11111010; // Register 3 EICR = 0b01001010; // TLI Interrupt not allowed WDGCR = 0b01111111; SICSR = 0b00000000; MCCSR = 0b00000010; MCCBCR = 0b00000000; // Beep Control Register TACR1 = 0b00000000; TACR2 = 0b00001000; // timerA Control Register2 TASR = 0b00000000; // timerA Control/Status Register TBCR1 = 0b01000000; // timerB Control Register1 TBCR2 = 0b00001000; // timerB Control Register2 TBSR = 0b00000000; // timerB Control/Status Register SCICR1 = 0b00000000; // SCI Control Register 1 SCICR2 = 0b00000000; // SCI Control Register 2 SCIBRR = 0b11001001; // -> 9.600 Baud SCIETPR = 0b00000000; SCIERPR = 0b00000000; ADCCSR = 0b00000000; ARTCSR = 0b01111000; // PWM Auto-Reload Timer Control/Status Register PWMCR = 0b00010000; // PWM Control Register ARTARR = 0; //256;//PWMmax; // Auto-Reload Register PWMDCR0 = 256; //0b00000000; ARTICCSR = 0b00000000; Can You checked it whether they are correkt or not? Mainly I mean the ini of the interrupts. The I/Os depend on my application, of course. regards, Ampel