Posted on May 14, 2008 at 14:12The STR750 reference is vague on how word alignment is handled in DMA burst mode. My DMA source is SSP0 and destination is unaligned buffer in onboard RAM. At the moment I have it working in single DMA mode, with source and destination set to byte, but this takes two DMA cycles for each byte.
First question, can I set the RAM destination to be word, and if so does it handle unaligned addresses and partial word transfers? For example, RAM buffer starts at 0x40003105, transferring 7 bytes from SSP0. Will the DMA unit transfer 3 bytes, then 4 bytes in two DMA writes to memory?
Second question, what about alignment on the source? SSP0 is configured for 8 bit data, so the source size is always byte, but what happens if I set up source burst size as word? As in the first example, if I transfer 7 bytes, will I see a word followed by a partial word on source burst from the SSP buffer?
To minimize DMA cycles, do I need to split up the DMA into single byte for the unaligned portion, then word for the aligned part?
