STR710-EVAL board JTAG Reset Circuitry (J4)

chrisw · ‎2004-12-02

Posted on December 03, 2004 at 05:35

chrisw · ‎2004-12-01

Posted on December 02, 2004 at 07:29

Does anyone know why the JTAG Interface on the ST Evaluation Board has a jumper (J4) to connect notJRST to notReset, thus bypassing the reset circuitry (the grates made up from TR4, TR1, etc.).

With the default J4 not fitted, the system works fine! But I can't establish comms between the debugging environment and the target - we're using Ashling Pathfinder and the Opella USB pod. What's the purpose of this configuration?

We're currently in the process of building a proprietary system based on the STR7and I'm wondering if we need a reset circuit similar to that on our board?

Thanks

Chris