Posted on July 21, 2005 at 09:48WoRo,
On page 66 of the manual.
DUTY CYCLE REGISTERS (PWMDCRx)
Read/Write
Reset Value: 0000 0000 (00h)
However, I find that I need to add 5 to the duty cycle value that I put into the PWMDCRx register if I want to get the correct duty cycle.
The ARTARR register sets the ''first edge location'', in my case:
***
#define AUTO_RELOAD_TIME 6 /* Fpwm = Fcounter / 256 - ARTARR */
/* for a Fcounter of 1MHz and ARTARR = 6 you get a 4kHz PWM */
void timebase_PWMART_init(void)
{
ARTARR = AUTO_RELOAD_TIME;
***
Basically I am trying to emulate a classical PWM that uses a triangle waveform generator and a comparator. I have worked out that all I need to do is take samples of my audio waveform using the ADC at 4kHz rate and by using 2 PWM channels, one to generate an ''ON'' period and the other to generate an ''ON plus OFF'' period and NANDing these 2 outputs I can get a centre aligned duty cycle that is related to the amplitude of the incoming audio signal. Here is the ISR that is triggered by the PWM. The PWMDCR1 and PWMDCR2 values are loaded into the PWM and at the next interrupt become the new vlaues for the next duty cycle.
***
@interrupt void timebase_PWMART_ISR(void)
{
uint8_t adc_data_value = 0;
uint8_t off_time = 0;
uint8_t on_time = 0;
mask_interrupts();
if(ARTCSR)
{} // just a read to clear the OVF flag
adc_data_value = adc_read(ADC_CHANNEL_ZERO); // takes about 8uS
off_time = (uint8_t)((adc_data_value) / 2);
PWMDCR1 = (uint8_t)(off_time + 5);
PWMDCR2 = (uint8_t)(250 - off_time + 5);
unmask_interrupts();
}
***
Also, because the PWMDCRx registers need this 5 added to them you can only go to 250, i.e. if off_time was zero then PWMDCR2 gets loaded with 255.
Notes:
- there may be a small issue with taking a 8bit ADC value and dividing it by two, so some samples could be out by 0.5.
- uint8_t is my type for an unsigned 8bit variable.
- would be nice if the ADC had an interrupt flag, but fortunately this is the only job this uP is doing!
The fact that the above works suggests to me that the PWMDCRx register is reset to 0xFC and not 0x00.
Cheers,DaveF
