st10f168 class b int after uprog=1

michaeltscharntke9 · ‎2005-06-16

Posted on June 16, 2005 at 12:46

michaeltscharntke9 · ‎2005-04-04

Posted on April 04, 2005 at 18:41

Hello.

I have a problem with ST10F168. After setting the Uprog bit to protect internal flash (beginning with adress 0) i receive class b interrupts with illegal opcode flag set. Without setting uprog bit all runs fine. Afer some tests i think the problem has to do with remapping my interrupt vektors. Has anybody ever had such a problem? I can not find any errors...

The Interrupt Table starts at adress 0 in internal flash and there is a jump to external flash with external interrupt table (beginning at 0x8000).

(As in the Tasking application notes. All interrupts jumps to an interrupt table in external flash instead of interrupt 0 = reset which activates some sort of boot program. The interrupt table of main program is generated by compiler C166 8.0r2 at specified adress.)

How i said, the program with all these meachnism works fine with an unprotected mcu. If i protection is set it seems that there comes some undefined code somewehere... :(

kindest regards,

itsme

@SET(RESET, 0h)

@SET( VEC_RAM_START, 1)

@SET( VEC_RAM_END, 127)

@SET( MAXINT, 127)

_vectab_base VTABLE PROC NEAR

@SET(I,0)

@WHILE (@I<=@MAXINT)

@IF( @I==@RESET)

JMPS SEG(__CSTART),SOF(__CSTART)

@ELSE

@IF ((@I>=@VEC_RAM_START) AND (@I<=@VEC_RAM_END))

JMPS SEG(_ram_table),SOF(_ram_table+4*@I)

@ELSE

JMPS SEG(VTABLE),SOF(VTABLE+4*@I)

@ENDI

@SET(I,@I+1)

@ENDW

RETV

VTABLE ENDP

VECTABLE ENDS

END

michaeltscharntke9 · ‎2005-04-04

Posted on April 05, 2005 at 08:00

Going on with my problem that a class b interrupt occurs after protecting internal flash it seems that the class b interrupt occurs if an access to the internal interrupt table is done.

For example:

Output in interrupt function:

printf (''\nClass B Trap at SP=0x%04X (0x%04X,0x%04X,0x%04X) TFR=0x%04X STKOV=0x%04X STKUN=0x%04X\n'', SP,memaccessword[SP>>1],memaccessword[(SP+2)>>1],memaccessword[(SP-2)>>1], TFR,STKOV,STKUN);

Output:

Class B Trap at SP=0xFBEC (0x0088,0x0000) TFR=0x0080 STKOV=0xF80C STKUN=0xFC00

(Timer 2 => offset 00088h => 0x00088 FA 00 88 80 => JMP 0,0088h)

If UPROG bit is set it seems (i think so, otherwise it would not only work if protection is disabled) that the MCU reads B88B instead of the FA008880. But class b is mapped in same way and this works. In my understanding of the protection mechanism of st10 should have no problems with this.

Is there any restriction in using internal AND external flash together with interrupt map in internal flash and protection bit set?

michaeltscharntke9 · ‎2005-06-16

Posted on June 16, 2005 at 12:46

The problem is solved but if you work with external AND internal Flash and internal Flash begins at Address Zero it is NOT possible to protect because the protection algorithm returns B88B instead of the right instruction after an interrupt occured while a program is running in external adress space...

That seems to be a mistake/error/disadvantage of the core.. :(

(Theoretically it should be okay but practically itÂ´s unuseful..)